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X704-533
General Info
Designer	Exponential Technology
Manufacturer	Hitachi
Model Number	X704-533
Market	Desktop
Introduction	January 7, 1997 (announced)
General Specs
Family	X704
Frequency	533 MHz
Bus type	60x bus
Bus speed	100 MHz
Clock multiplier	5.3
Microarchitecture
Microarchitecture	X704
Platform	CHRP
Process	500 nm
Transistors	2,700,000
Technology	BiCMOS
Die	150 mm²
Word Size	32 bit
Cores	1
Threads	1
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
Power dissipation	85 W
Vcore	3.6 V

X704 533 MHz was a PowerPC-compatible microprocessor operating at 533 MHz announced in January 1997 by Exponential Technology. This was exponential flagship model, however the company folded before the model ever reaching market (See X704 § History).

Cache

Main article: X704 § Cache

Level 3 can be provided externally with cache size of 512 KiB to 2 MiB.

Cache Info [Edit Values]
L1I$	2 KiB 2,048 B 0.00195 MiB	1x2 KiB direct mapped
L1D$	2 KiB 2,048 B 0.00195 MiB	1x2 KiB direct mapped
L2$	32 KiB 0.0313 MiB 32,768 B 3.051758e-5 GiB	1x32 KiB 8-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

• Fully PowerPC 60x-compatible architecture
• IEEE 1149.1-compliant JTAG test access port
• IEEE 754-compliant single-precision and double-precision arithmetic
• Support for standard PowerPC 60X bus with 64 bits of data and 32 bits of address
• Support for all PowerPC cache operations
• Support for PowerEndian and BigEndian modes

Documents

Manuals

• X704 Technical Summary, 1996

See also

• PowerPC
• X704