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Duron 800 (Spitfire) - AMD
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Revision as of 15:21, 13 December 2017 by ChippyBot (talk | contribs) (Bot: switching template from {{mpu}} to a more generic {{chip}})

Edit Values
Duron 800
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 800
Part NumberD800AVS1B
MarketDesktop
IntroductionApril 2, 2001 (announced)
April 2, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency800 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier8
CPUID630
Microarchitecture
MicroarchitectureK7
Core NameSpitfire
Core Family6
Core Model3
Core Stepping0
Process180 nm
Transistors25,000,000
TechnologyCMOS
Die100 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.5 V ± 0.1 V
TDP33.2 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

Duron 800 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2001. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 800 MHz with a bus capable of 200 MT/s with a TDP of 33.2 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:chip features

  • Halt State
  • Sleep State

Documents

DataSheet

Other

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +