-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Bulldozer - Microarchitectures - AMD
< amd | microarchitectures
Edit Values | |
Bulldozer µarch | |
General Info | |
Arch Type | CPU |
Designer | AMD |
Manufacturer | AMD |
Introduction | October 12, 2011 |
Process | 32 nm |
Instructions | |
ISA | x86-16, x86-32, x86-64 |
Succession | |
Bulldozer was the microarchitecture developed by AMD as a successor to K10. K10 was superseded by Piledriver in 2011.
Architecture
![]() |
This section is empty; you can help add the missing info by editing this page. |
Die Shot
All Bulldozer Chips
Bulldozer Chips | ||||||
---|---|---|---|---|---|---|
Model | Family | Core | Launched | Power Dissipation | Freq | Max Mem |
Count: 0 |
See also
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/microarchitectures/bulldozer&oldid=68698"
Hidden category:
Facts about "Bulldozer - Microarchitectures - AMD"
codename | Bulldozer + |
designer | AMD + |
first launched | October 12, 2011 + |
full page name | amd/microarchitectures/bulldozer + |
instance of | microarchitecture + |
instruction set architecture | x86-16 +, x86-32 + and x86-64 + |
manufacturer | AMD + |
microarchitecture type | CPU + |
name | Bulldozer + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |