From WikiChip
Kaby Lake R - Cores - Intel
< intel
Revision as of 03:42, 21 August 2017 by At32Hz (talk | contribs)

Edit Values
Kaby Lake R
General Info
DesignerIntel
ManufacturerIntel
IntroductionAugust 21, 2017 (announced)
August 21, 2017 (launched)
Microarchitecture
ISAx86-64
MicroarchitectureKaby Lake
Word Size
8 octets
16 nibbles
64 bit
Process14 nm
0.014 μm
1.4e-5 mm
TechnologyCMOS
Succession

Kaby Lake R (KBL-R) is the name of the core for Intel's line of low-power mobile processors based on the Kaby Lake microarchitecture serving as a refresh to Kaby Lake U. These chips are primarily targeted towards light notebooks and laptops, portable all-in-ones (AiOs), minis, and conference rooms. Coffee Lake U processors are fabricated on Intel's 2nd generation enhanced 14nm+ process.

Overview

Kaby Lake R based processors are a single-chip solution - the chipset is packaged in the same physical casing as the CPU in a multi-chip package (MCP). Unlike Kaby Lake U, there are no variations with 3 dies which incorporated an on-package cache (OPC) in addition to the hub and CPU. Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate. All Kaby Lake R processors use Socket BGA-1356.

Common Features

All Kaby Lake R processors have the following:

designerIntel +
first announcedAugust 21, 2017 +
first launchedAugust 21, 2017 +
instance ofcore +
isax86-64 +
manufacturerIntel +
microarchitectureKaby Lake +
nameKaby Lake R +
process14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +