Template:mpu Atom C3708 is a 64-bit octa-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3708, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.7 GHz with a TDP of 17 W. The C3708 supports up to a dual-channel of 256 GiB of DDR4-2133 ECC memory. This model is part of Denverton's Internet of Things and eTEMP SKUs which come with integrated QuickAssist Technology and support extended ambient operating temperature (-40 °C to 85 °C).

Cache

Main article: Goldmont § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 448 KiB 458,752 B 0.438 MiB L1I$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 8-way set associative write-back L1D$ 192 KiB 196,608 B 0.188 MiB 8x24 KiB 6-way set associative write-back L2$ 16 MiB 16,384 KiB 16,777,216 B 0.0156 GiB     8x2 MiB 16-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3L-1600, DDR4-2133 Supports ECC Yes Max Mem 256 GiB Controllers 1 Channels 2 Max Bandwidth 31.79 GiB/s 32,552.96 MiB/s 34.134 GB/s 34,134.253 MB/s 0.031 TiB/s 0.0341 TB/s Bandwidth Single 15.89 GiB/s Double 31.79 GiB/s

Expansions

This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0 Max Lanes: 20 Configuration: x8, x4, x2 USB Revision: 3.0 Max Ports: 8 SATA Revision: 3.0 Max Ports: 16 HSIO Max Lanes: 20

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 AES AES Encryption Instructions RdRand Hardware RNG SHA SHA Extensions x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute EIST Enhanced SpeedStep Technology VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT) MPX Memory Protection Extensions