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From WikiChip
Alpha 21464 - Microarchitectures - Compaq
Edit Values | |
Alpha 21464 µarch | |
General Info | |
Arch Type | CPU |
Designer | Compaq |
Manufacturer | IBM |
Process | 0.13 µm |
Core Configs | 1 |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Stages | 8 |
Decode | 8-way |
Instructions | |
ISA | Alpha |
Cache | |
L1I Cache | 64 KiB/core 4-way set associative |
L1D Cache | 64 KiB/core 4-way set associative |
Succession | |
Alpha 21464 was an ambitious Alpha microarchitecture designed by Compaq as a successor to the Alpha 21364. The project was cancelled in June 2001 when Compaq announced their commitment to Intel's Itanium.
References
- Seznec, André, et al. "Design tradeoffs for the Alpha EV8 conditional branch predictor." Computer Architecture, 2002. Proceedings. 29th Annual International Symposium on. IEEE, 2002.
Retrieved from "https://en.wikichip.org/w/index.php?title=compaq/microarchitectures/alpha_21464&oldid=44504"
Facts about "Alpha 21464 - Microarchitectures - Compaq"
codename | Alpha 21464 + |
core count | 1 + |
designer | Compaq + |
full page name | compaq/microarchitectures/alpha 21464 + |
instance of | microarchitecture + |
instruction set architecture | Alpha + |
manufacturer | IBM + |
microarchitecture type | CPU + |
name | Alpha 21464 + |
pipeline stages | 8 + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |