From WikiChip
CN5734-800 SP - Cavium
< cavium‎ | octeon plus
Revision as of 23:50, 28 December 2016 by ChipIt (talk | contribs)

Template:mpu CN5734-800 SP is a 64-bit hexa-core MIPS storage processor (SP) designed by Cavium and introduced in 2007. This processor, which incorporates six cnMIPS cores, operates at 800 MHz and supports up to DDR2-800 dual channel ECC memory. This MPU includes a number of hardware accelerators specifically for improving the performance of storage and network software such as RAID, networking, TCP & QoS acceleration.

Retrieved from "https://en.wikichip.org/w/index.php?title=cavium/octeon_plus/cn5734-800bg1217-sp&oldid=32272"
Facts about "CN5734-800 SP - Cavium"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
CN5734-800 SP - Cavium#package + and CN5734-800 SP - Cavium#io +
base frequency800 MHz (0.8 GHz, 800,000 kHz) +
core count6 +
designerCavium +
familyOCTEON Plus +
first announcedJune 26, 2007 +
first launchedAugust 2007 +
full page namecavium/octeon plus/cn5734-800bg1217-sp +
has ecc memory supporttrue +
has hardware accelerators for data compressiontrue +
has hardware accelerators for data decompressiontrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for tcp packet processingtrue +
has hardware raid 5 supporttrue +
has hardware raid 6 supporttrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size288 KiB (294,912 B, 0.281 MiB) +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateAugust 2007 +
main imageFile:Octeon CN57xx.svg +
manufacturerTSMC +
market segmentStorage +
max cpu count1 +
max memory bandwidth11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels2 +
max pcie lanes8 +
microarchitecturecnMIPS +
model numberCN5734-800 SP +
nameCavium CN5734-800 SP +
packageFCBGA-1217 +
part numberCN5734-800BG1217-SP +
process90 nm (0.09 μm, 9.0e-5 mm) +
seriesCN57xx +
smp max ways1 +
supported memory typeDDR2-800 +
technologyCMOS +
thread count6 +
word size64 bit (8 octets, 16 nibbles) +