-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Xeon E5-2643 v4 - Intel
Template:mpu The Xeon E5-2643 v4 is a 64-bit hexa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for frequency-optimized 2S environments (2U square form factor). Operating at 3.4 GHz with a turbo boost frequency of 3.7 GHz for a single active core, this MPU has a TDP of 135 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
L2$ | 1.5 MiB 1,536 KiB 1,572,864 B 0.00146 GiB |
6x256 KiB 8-way set associative (per core, write-back) |
L3$ | 20 MiB 20,480 KiB 20,971,520 B 0.0195 GiB |
6x3.325 MiB 20-way set associative (shared, per core, write-back) |
Facts about "Xeon E5-2643 v4 - Intel"
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |