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ssssssssssss
DATA BUS I/O		D0	01		16	CM-RAM0		X
		D1	02		15	CM-RAM1	X
		D2	03		14	CM-RAM2	X
		D3	04		13	CM-RAM3	X
		Vss	05		12	Vdd	X
CLOCK PHASE 1/2		Ø1	06		11	CM-ROM	X
		Ø2	07		10	TEST	X
		SYNC	08		09	RESET	X
1	2	3	4	5	6	7	8	9

Cache Info[Edit Values]

L1$

L2$

L3$

L4$