MAJ Gate

Typical Symbol

Functional

Truth Table

3-input Majority Gate Inputs Outputs A B C Q 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1

Other Gates Buffer TriBuffer NOT AND OR XOR NAND NOR XNOR Trans AOI OAI MAJ INH IMPLY NIMPLY

Other Components Plexers MUX DEMUX Encoder Decoder Pri-Encoder ALU Adder Subtractor Multiplier Divider Shifter Rotator MAC Comparator Negator Memory D latch D flip-flop SR latch JK flip-flop T flip-flop Register Register file SRAM Counter ROM CAM DRAM I/O Shift register SIPO PISO ADC DAC

The majority gate (MAJ gate) is a logic gate that implements the majority function - a device that outputs a HIGH when the majority of its inputs are HIGH, otherwise it outputs a LOW.

MAJ3

A 3-input MAJ gate (MAJ3) can be implemented as . However the naive implementation will result in up to 30 transistors. Since , we can define and that can be implemented using a single AOI222 which is defined as - i.e. .