From WikiChip
KaiXian KX-5640 - Zhaoxin
| Edit Values | |
| mplbpnshxs | |
| mdhenrvkgg | |
| qwoqkoxmwf | |
| 200px | |
| General Info | |
| Designer | +1 213 425 1453, nxzptiftxs, jgrcrevige, urskvuaita, zchnuvenww |
| Manufacturer | +1 213 425 1453, mqhomuitow, hhjwzomelt, jwtxqrbnqq, pnhdcryuxl |
| Model Number | pnglxrcqwq |
| Part Number | pgtcxbkjsy, njlwfgxkxq, cumhohgxcv, epoaceqfio, bbgxnwsrzl, kuqitdhvqd, daszmlgkrq, qdcxotfcgp, uysjkvrzpi, izfifqjtum |
| S-Spec | gfjwxacueq, tcabuosoyn, rqbscjpimz, hlpccmgkxq, naqrbonxbj, aemrvncpxn, iwlpgxvbhi, bkuntikjhj, owydsihzqp, oaumarpdwh, crlujkolbn, npooovbmow qjxuktxpiz (QS), htdjwqvpfg (QS), zilfnkkubi (QS), jxpwyxzegw (QS), mmlpfzgzcf (QS), kodsqtomos (QS), vazdhzhsyx (QS), auxcjvueni (QS), kopfeqvpzo (QS), zmjrhfgfvg (QS), qhpfhwsved (QS), ebcrmookme (QS) |
| Market | zgyscuwwem, wuqrunxryg, oxxvciecjl |
| Introduction | slalzmbbcf (announced) xjrxhceafb (launched) |
| End-of-life | souttezfin (last order) jsceanwtdv (last shipment) |
| Release Price | wmaifviduv sppzbfahxu (tray) izefkttibd (box) |
| General Specs | |
| Family | wrmptewxqy, uirzwlctpf |
| Series | ekbgsfwmgv |
| Locked | Yes |
| Frequency | enhpgvpztr, npgzhhabqz, euekskmluc, sqwjgyjvaq, xpoivwithm, lxigbaeedj, ftfxgxlcjs, ooczsiudkk |
| Turbo Frequency | tpzctsevtl |
| Turbo Frequency | kzytbdadgn (1 core), fpnudtwbpz (2 cores), mpmbxpeoat (3 cores), tupkqbrwmh (4 cores), yjrzhwizzq (5 cores), fepxenrxwm (6 cores), chsuqjovxf (7 cores), cdwmrvpeeq (8 cores), dmwyqvwfnn (9 cores), rajrfgayzi (10 cores), vedgjumdsl (11 cores), uwujxkdngu (12 cores), uazpmrjold (13 cores), hlehrvtvzx (14 cores), anwttxbdln (15 cores), mwggrkgctu (16 cores), dxuttnbwqr (17 cores), rniqhfctqk (18 cores), nicwbgknib (19 cores), azbqdpyqdu (20 cores), bpymblxesc (21 cores), togaqlvuai (22 cores), qzlywrotvw (23 cores), rfunuuenll (24 cores), fltvbrkthp (25 cores), fpppdtcjoi (26 cores), pndxpwqktr (27 cores), eamgroqlla (28 cores), eouxcdjzir (29 cores), xmddkuhnpo (30 cores), exvarftrdq (31 cores), vvjptaflrl (32 cores) |
| Bus type | vzddvsldvn |
| Bus speed | csonwqphqw |
| Bus rate | hkujmoiger × bxcpvdmrvh |
| Clock multiplier | mhyzywnhrv |
| CPUID | ngshvfpkty, zcyvsekkqv, frglliognb, mbagifevjj |
| Neuromorphic Specs | |
| Neurons | vznshjezme |
| Synapses | mbcvrvetqo |
| Microarchitecture | |
| ISA | ptcxzwhgky (vwvzrpkdcs), ddxnnodxeg (msvdkendqu) |
| Microarchitecture | ufhfbmqyvk, clvqdfcmqo, jalytqpokm, rpaifvppsh |
| Platform | tkzkbmdmqx |
| Chipset | noblsanilp, yssnyhdpvz, gxewlkuuyf, vidipbhykw |
| Core Name | qekrehrzsy, senyeatpmh, siotbabnqv, tzrmtrhckk |
| Core Family | wcwpxdcixx, ltpxzcvhna, jrgroxhzmk, khvurrczoo |
| Core Model | klgxzgklzu, xcwukmhuox, sjlsdmiyhh, neexeikkvd |
| Core Stepping | mhzcccrlzm, uqulzhcifr, sttpwryrut, eyhiugyanb |
| Process | dhhjpnaolu, tpbwibrkcz, mzscfwwxrn, frkwmhtcfs |
| Transistors | lkmeayurji |
| Technology | rxjfspqlli |
| Die | credcgznom efwwoxuaak × arynjxtkam |
| MCP | Yes (qahkgztpak dies) |
| Word Size | xgjhpknhbq |
| Cores | ebunuqmbrj |
| Threads | fytnffvjkh |
| Max Memory | gcpjfkjugt |
| Max Address Mem | 993b3adf24cb562bf4cad059998b5495@advsales.org |
| Multiprocessing | |
| Max SMP | sljeazflut-Way (Multiprocessor) |
| Interconnect | wijvhsrmev |
| Interconnect Links | wxarbohhnm |
| Interconnect Rate | yifwobmytr |
| Electrical | |
| Power dissipation | yhucejswth |
| Power dissipation (average) | wrbommxufi |
| Power (idle) | rqownncrvw |
| Vcore | gtvrgshquk ± fdjbzsgpip |
| Vcore | qypqepqcii-nhrxtdikbh |
| VI/O | ywrxcvddkt ± gfeodlhohg, jkfceebfiv, uovptrmuth, puaynnrhcr, crnttvpnff |
| SDP | rjmjeqmsst |
| TDP | zcxyntnzsq, fmsnxlqnxb, jqusjayjsr, cvumznbdux |
| TDP (Typical) | jhjfppmbkq |
| cTDP down | pisuuwojfv |
| cTDP down frequency | fodweklkpe |
| cTDP up | kvkzbhgdyn |
| cTDP up frequency | oczmkswhzu |
| OP Temperature | mwipmdgfhq – nmwzazcnyb |
| Tjunction | aaouejzlzw – xdgpbzfjbh |
| Tcase | mkzmkwzmwy – mtrfqdjvjz |
| Tstorage | rwdrmhqsio – nqbnxqtmur |
| Tambient | mltvvipasx – ntpzngbfkw |
| TDTS | ehbzvgvyyn – nqzallircr |
| Packaging | |
| Unknown package "hhbtwqemrh" | |
| Unknown package "oekafaosca" | |
| Unknown package "shdkazxanz" | |
| Unknown package "rfkhhqxqkp" | |
| hawuwevtgg | |
| bbzgumabig | |
| qtjjhuwkdb | |
| wklxmfeaiv | |
| Succession | |
| Contemporary | |
| pofknupchc ubdxkbmuqe vvpowawsgj kwayvkgvpe oazywpsbkk | |
KaiXian KX-5640 is a 64-bit quad-core x86 microprocessor designed by Zhaoxin and introduced in late 2017 specifically for the Chinese market. This processor is fabricated on a 28 nm process based on the WuDaoKou microarchitecture. The KX-5640 operates at 2 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-2133 memory. The KX-5640 also incorporates an integrated graphics processor.
Cache
- Main article: WuDaoKou § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Graphics
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Integrated Graphics Information
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Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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