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• hitachi/hd404720
  ! Part !! program ROM !! pattern ROM !! RAM !! I/O Ports !! Notes
  2 KB (214 words) - 15:55, 4 February 2016
• hitachi/hmcs400
  ! Part !! ROM !! RAM !! Line !! Notes
  9 KB (1,127 words) - 20:43, 8 February 2016
• rca/epic
  | {{\|GP301}} || [[ROM]] (4096x4-bit) | {{\|GP302}} || [[ROM]] (4096x4-bit)
  3 KB (297 words) - 22:54, 24 April 2016
• atmel/marc4
  ! Part !! ROM<br>(Prog) !! ROM<br>(Data) !! RAM !! I/O Ports !! Package !! Mem Type !! Notes | {{\|ATAR080}} || 2 kB || || 256x4 b || 12 || SO20 || ROM ||
  6 KB (787 words) - 21:05, 7 February 2016
• oki/olms-64
  ! Part !! ROM !! RAM !! I/O !! Stack !! Package !! Notes
  3 KB (275 words) - 23:03, 7 February 2016
• oki/olms-65
  ! Part !! ROM !! RAM !! I/O !! Stack !! Package !! Notes
  2 KB (224 words) - 22:21, 7 February 2016
• oki/olms-60
  ! Part !! ROM !! RAM !! I/O !! Stack !! Inst. !! Frequency !! Package !! Notes
  2 KB (200 words) - 22:58, 7 February 2016
• oki/olms-50
  ! Part !! ROM !! RAM !! I/O !! Stack !! Inst. !! Frequency !! Package !! Notes
  2 KB (235 words) - 22:56, 7 February 2016
• oki/olms-40
  ! Part !! ROM !! RAM !! I/O !! Stack !! Inst. !! Frequency !! Package !! Notes
  2 KB (225 words) - 22:47, 7 February 2016
• sharp corporation/sm
  ! Part !! Tech !! ROM !! RAM !! Description
  2 KB (260 words) - 19:14, 8 February 2016
• fairchild/f8
  | {{\|3851}} || [[ROM]] ! Part !! I/O Lines !! Regs !! RAM !! ROM !! Description
  2 KB (172 words) - 17:18, 12 December 2016
• intel/mcs-80
  | {{intel|2716}} || 2048x8 bit || EPROM (pin compatible with {{intel|2316E}} ROM) | {{intel|8308}} || 1024x8 bit || MOS ROM (pin compatible with {{intel|8708}} PROM)
  4 KB (406 words) - 16:10, 26 January 2019
• intel/microarchitectures/bonnell
  ...directly. Those selected few get diverted into the '''micro-code sequencer ROM''' ('''MSROM''') for decoding producing much more sane RISCish instructions
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/haswell (client)
  ...µOps/cycle. The cache supports microcoded instructions (being pointers to ROM entries). Cache is shared by the two threads.
  27 KB (3,750 words) - 06:57, 18 November 2023
• intel/microarchitectures/sandy bridge (client)
  ...ur µOPs, the instruction detours through the [[microcode sequencer]] (MS) ROM. When that happens, up to 4 µOPs/cycle are emitted until the microcode seq ...he two threads and can also hold pointers to the [[microcode sequencer]] [[ROM]]. It's also virtually addressed and is a strict subset of the L1 instructi
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/skylake (client)
  ...ur µOPs, the instruction detours through the [[microcode sequencer]] (MS) ROM. When that happens, up to 4 µOPs/cycle are emitted until the microcode seq
  79 KB (11,922 words) - 06:46, 11 November 2022
• exponential technology/x704
  ...ify their ROM. In mid-April Apple agreed to provide clones with a modified ROM but at higher charge (supposedly proportional to the processor speed used). ...ount of time. As a last straw; Apple never delivered the promised modified ROM.
  8 KB (1,228 words) - 20:49, 2 June 2019
• p-rating
  ...s CD-ROM (PC Magazine Labs)]; Ziff-Davis Publishing Group PC Benchmarks CD-ROM, including Winstone 96 and Winbench 96 benchmarks. From PC Magazine Labs, i
  3 KB (456 words) - 06:30, 8 July 2020
• amd/microarchitectures/zen
  ...at end up emitting more than two macro-ops will be redirected to microcode ROM. When this happens the OP Queue is stalled (possibly along with the decoder ...a secured kernel with the firmware which sits externally (e.g., on an SPI ROM). The secure processor is responsible for the cryptographic functionalities
  79 KB (12,095 words) - 15:27, 9 June 2023
• amd/microarchitectures/zen 2
  ...nd at this stage probably represented by a macro-op containing a microcode ROM entry address. In the Zen/Zen+ microarchitecture AVX-256 instructions which ...f macro-ops from the micro-op queue. A patch RAM supplements the microcode ROM and can hold additional sequences. The microcode sequencer supports branchi
  57 KB (8,701 words) - 22:11, 9 October 2022

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