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  • * [[GPU]] with 12 or 16 execution units
    4 KB (488 words) - 19:42, 5 October 2020
  • * In-order ...chitectures such as aggressive [[speculative execution]], [[out-of-order]] execution, and µop transformation.
    38 KB (5,468 words) - 20:29, 23 May 2019
  • ...ss penalty. It's also still a dual-issue [[superscalar]] but with in-order execution. Reordering logic is was still omitted due to power and area restrictions. * '''Execution'''
    7 KB (872 words) - 19:42, 30 November 2017
  • ...wer. Silvermont is the first microarchitecture to introduce [[out-of-order execution]] (OoOE) ...ree stages of the pipeline. However, with the introduction of out-of-order execution, silvermont's more aggressive fetching and branch prediction mean stalled i
    9 KB (1,160 words) - 09:35, 25 September 2019
  • ...the most part identical to {{intel|Silvermont}} with some higher number of execution units to the GPU in some of the higher-end models.
    5 KB (568 words) - 19:40, 30 November 2017
  • ** {{intel|HD Graphics 400}} '''→''' {{intel|HD Graphics 500}} (12 Execution Units, no change) ** {{intel|HD Graphics 405}} '''→''' {{intel|HD Graphics 505}} (18 Execution Units, up from 16)
    7 KB (956 words) - 23:05, 23 March 2020
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 405}} GPU which has 18 execution units and operates at 400 MHz. | execution units = 18
    4 KB (529 words) - 17:41, 27 March 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 405}} GPU which has 16 execution units and operates at 400 MHz. | execution units = 16
    5 KB (701 words) - 17:40, 27 March 2018
  • ...his SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 16 execution units and operates at 400 MHz. | execution units = 16
    4 KB (540 words) - 17:40, 27 March 2018
  • ...his SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 12 execution units and operates at 320 MHz up to 600 MHz bursts. | execution units = 12
    4 KB (544 words) - 17:43, 27 March 2018
  • ...his SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 12 execution units and operates at 320 MHz with 600 MHz busts. | execution units = 12
    4 KB (580 words) - 09:40, 8 July 2022
  • ...his SoC incorporates the {{intel|HD Graphics (Braswell)}} GPU which has 12 execution units and operates at 320 MHz with up to 640 MHz bursts. | execution units = 12
    5 KB (724 words) - 06:10, 2 December 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 400}} GPU which has 12 execution units and operates at 320 MHz with up to 600 MHz bursts. | execution units = 12
    4 KB (539 words) - 17:39, 27 March 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 400}} GPU which has 12 execution units and operates at 320 MHz with up to 640 MHz bursts. | execution units = 12
    4 KB (535 words) - 17:39, 27 March 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 400}} GPU which has 12 execution units and operates at 320 MHz with up to 600 MHz bursts. | execution units = 12
    5 KB (722 words) - 01:50, 24 November 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 400}} GPU which has 12 execution units and operates at 320 MHz with up to 700 MHz bursts. | execution units = 12
    4 KB (533 words) - 17:41, 27 March 2018
  • ...GHz. This SoC incorporates the {{intel|HD Graphics 400}} GPU which has 12 execution units and operates at 320 MHz with up to 700 MHz bursts. | execution units = 12
    4 KB (539 words) - 17:39, 27 March 2018
  • ...nnels. Additionally, all models also support {{x86|AVX-512}} with a single execution unit.
    13 KB (1,784 words) - 08:04, 6 April 2019
  • * Execution Engine
    14 KB (1,891 words) - 14:37, 6 January 2022
  • ...|Ivy}} but expands on them considerably in the execution engine with wider execution units and additional scheduler ports. ** 2 additional execution ports (see [[#Execution_Units]])
    27 KB (3,750 words) - 06:57, 18 November 2023

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