Page title matches

Page text matches

• Micro-Operations
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:58, 23 April 2017
• Micro-Ops
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:58, 23 April 2017
• micro-ops
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:58, 23 April 2017
• µOP
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:59, 23 April 2017
• µOPs
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:59, 23 April 2017
• µop
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:59, 23 April 2017
• µops
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 14:59, 23 April 2017
• micro-operations
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 18:30, 23 April 2017
• internal operation
  ...rchitectural instruction]], a transformed version of those instructions, [[micro-operations]], or [[macro-operations]].
  370 bytes (45 words) - 18:31, 23 April 2017
• macro-operation fusion
  {{title|Macro-Operation Fusion (MOP Fusion)}}{{confuse|micro-operation fusion}} * [[micro-operation fusion]]
  11 KB (1,614 words) - 23:01, 8 May 2020
• dec/microarchitectures/alpha 21064
  * McLellan, Edward. "The Alpha AXP architecture and 21064 processor." IEEE Micro 13.3 (1993): 36-47.
  4 KB (527 words) - 02:09, 4 August 2017
• acorn
  * {{acorn|BBC Micro}}
  1 KB (159 words) - 17:55, 30 June 2017
• first
  ..., the [[MP944]] chipset is one of the earliest examples of a complete VLSI micro-computer system chipset. The [[MP944]] is 20-bit microprocessor designed by * Micro Devices MD-1220
  6 KB (752 words) - 01:25, 19 January 2022
• physical core
  * [[Dickey v. Advanced Micro Devices, Inc.]]
  2 KB (294 words) - 01:39, 13 June 2018
• intel/loihi
  ...al. "Loihi: A Neuromorphic Manycore Processor with On-Chip Learning." IEEE Micro (2018).
  12 KB (1,817 words) - 01:28, 1 October 2021
• samsung/microarchitectures/m1
  ====== Micro-Sequencer ====== ...s instructions which result in multiple µOPs being emitted, M1 has a side micro-sequencer that will get invoked and emit the appropriate µOPs.
  13 KB (1,962 words) - 14:48, 21 February 2019
• samsung/microarchitectures/m3
  ...fetching of instructions, and the code of the [[ARM]] instructions into [[micro-operations]] to be executed by the back-end. ...s received a lot of attention in the M3. Additionally, the capacity of the micro-[[BTB]] was doubled to 128 entries which are used for caching very small ti
  20 KB (3,149 words) - 10:44, 15 February 2020
• amd/cpuid
  ...=pack}} || A-Series/E-Series APU "{{amd|Beema|l=core}}", A-Series/E-Series Micro APU "{{amd|Mullins|l=core}}" (low power), Embedded G-Series "{{amd|Steppe E
  21 KB (3,215 words) - 13:50, 24 July 2023
• cavium/microarchitectures/vulcan
  ...have licensed the ARMv7 and ARMv8 ISAs, allowing them to develop their own micro-architectures based on the ISA. Vulcan is the outcome of this effort which *** Decodes to [[micro-ops]]
  17 KB (2,449 words) - 22:11, 4 October 2019
• micro-op
  #REDIRECT [[micro-operation]]
  29 bytes (2 words) - 22:20, 31 May 2018

View (previous 20 | next 20) (20 | 50 | 100 | 250 | 500)