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• voltage regulator module
  ...ure protection|OTP]], [[undervoltage protection|UVP]], and [[short circuit protection|SCP]]), advanced controllers can actually control how many phases are turne
  18 KB (3,026 words) - 16:55, 19 January 2020
• page table entry
  ...rame number]] (PFN) and various [[control bits]] such as [[valid bit]] and protection bits (e.g. read-only or execute).
  353 bytes (57 words) - 01:22, 6 November 2017
• intel/management engine
  * "Storage Protection with Intel® Anti-Theft Technology - Data Protection (Intel® AT-d)", Ned Smith. Intel Technology Journal, Volume 12, Issue 4, 2
  7 KB (949 words) - 15:55, 15 November 2019
• intel/xeon e
  ...intel|vPro}}, Software Guard ({{intel|SGX}}), {{intel|Secure Key}}, Memory Protection ({{intel|MPX}}), and {{intel|OS Guard}} ...ure Key}}, Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, Identity Protection ({{intel|IPT}}), {{intel|SIPP}}
  11 KB (1,554 words) - 11:14, 2 June 2019
• greenwaves/gap8
  * Secured execution support with Memory Protection Unit (MPU)
  6 KB (981 words) - 14:11, 28 February 2018
• Property:x86/has memory protection extensions
  ...rty holding whether the microprocessors has support for x86's {{x86|Memory Protection Extensions}}.
  142 bytes (22 words) - 21:09, 6 April 2018
• intel/cores/cascade lake sp
  ...nt Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
  9 KB (1,291 words) - 13:48, 27 February 2020
• amd/sb-tsi
  * {{x86|Thermal protection}}
  2 KB (275 words) - 01:17, 2 April 2023
• intel/cores/ice lake y
  ...{{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}}
  5 KB (731 words) - 19:08, 26 February 2020
• intel/cores/whiskey lake u
  ...{{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}}
  4 KB (508 words) - 23:23, 2 August 2020
• intel/cores/ice lake u
  ...{{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}}
  6 KB (810 words) - 23:19, 12 May 2020
• intel/cores/comet lake u
  ...{{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}}
  4 KB (529 words) - 23:19, 12 May 2020
• intel/cores/coffee lake e
  ...{intel|TSX}}, {{intel|Secure Key}}, Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|TXT}}
  5 KB (748 words) - 12:14, 2 June 2019
• amd/packages/socket tr4
  |THERMTRIP_L||B-IO33-OD||{{x86|Thermal protection|Temperature Trip}} Input/Output
  86 KB (17,313 words) - 02:48, 13 March 2023
• amd/packages/socket sp3
  |THERMTRIP_L||B-IO33-OD||{{x86|Thermal protection|Temperature Trip}} Input/Output
  110 KB (21,122 words) - 02:46, 13 March 2023
• arm holdings/microarchitectures/neoverse n1
  *** ECC protection per 64 bits
  7 KB (980 words) - 13:46, 18 February 2023
• arm holdings/microarchitectures/cortex-a76
  *** Optional parity protection *** Optional ECC protection per 32 bits
  14 KB (2,183 words) - 17:15, 17 October 2020
• arm holdings/microarchitectures/cortex-a77
  *** Optional parity protection *** Optional ECC protection per 32 bits
  17 KB (2,555 words) - 06:08, 16 June 2023
• arm holdings/microarchitectures/cortex-a78
  *** Optional parity protection *** Optional ECC protection per 32 bits
  21 KB (3,067 words) - 09:25, 31 March 2022
• apm/microarchitectures/storm
  *** ECC and Parity protection *** ECC and Parity protection
  2 KB (231 words) - 04:17, 26 September 2018

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