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• cavium/microarchitectures/cnmips
  ...|MIPS64}} ISA designed by [[Cavium]] for their {{cavium|Octeon}} family of processors. The "cn" stands for "Cavium Networks" or "content networking". This microa
  7 KB (870 words) - 19:38, 23 June 2017
• qualcomm/centriq
  | arch = 64-bit ARM multi-core server processors '''Centriq''' is a family of {{arch|64}} multi-core [[ARM]] server processors designed by [[Qualcomm]] and introduced in late 2017.
  3 KB (320 words) - 22:10, 27 July 2021
• 2017
  * January 3: Intel introduces their mainstream processors based on {{intel|Kaby Lake|l=arch}}, including {{intel|Core i3|i3}}, {{inte * January 4: [[NXP]] launched the {{nxp|i.MX 8M}} family of processors capable of full [[4K]] UltraHD for Audio, Voice and Video Interactions
  8 KB (999 words) - 11:04, 3 January 2019
• cavium/octeon
  ...nterprise, and data center switches, routers, etc..). Cavium offers OCTEON processors with anywhere from [[single-cores|one]] to [[hexadeca-cores|sixteen]] cores ...processors containing just one cnMIPS core. Depending on the option, these processors either have an array of security-related hardware accelerators (e.g. [[AES]
  11 KB (1,489 words) - 09:25, 30 December 2020
• cavium/octeon/cn3005-300bg350-scp
  ...ium|cnMIPS|l=arch}} core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-400bg350-scp
  ...ium|cnMIPS|l=arch}} core, operates at 400 MHz and dissipates 3 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-500bg350-scp
  ...ium|cnMIPS|l=arch}} core, operates at 500 MHz and dissipates 4 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-300bg350-cp
  ...ium|cnMIPS|l=arch}} core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-400bg350-cp
  ...ium|cnMIPS|l=arch}} core, operates at 400 MHz and dissipates 3 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-500bg350-cp
  ...ium|cnMIPS|l=arch}} core, operates at 500 MHz and dissipates 4 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-300bg525-scp
  ...ium|cnMIPS|l=arch}} core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-400bg525-scp
  ...ium|cnMIPS|l=arch}} core, operates at 400 MHz and dissipates 3 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-500bg525-scp
  ...ium|cnMIPS|l=arch}} core, operates at 500 MHz and dissipates 2 Watts. This processors includes a number of hardware security communication accelerators including * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-300bg525-cp
  ...ium|cnMIPS|l=arch}} core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-400bg525-cp
  ...ium|cnMIPS|l=arch}} core, operates at 400 MHz and dissipates 3 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-500bg525-cp
  ...ium|cnMIPS|l=arch}} core, operates at 500 MHz and dissipates 4 Watts. This processors includes a number of hardware communication accelerators including units fo * [[:File:octeon cn30xx product brief.pdf|OCTEON CN30XX Processors Product Brief]]
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon plus
  ...] microprocessors designed by [[Cavium]] and introduced in [[2007]]. These processors are primarily marketed towards makers of network infrastructure, enterprise ...is also based on the {{cavium|cnMIPS|l=arch}} microarchitecture. These new processors operate at twice the previous clock speeds and introduced a number of incre
  6 KB (827 words) - 15:41, 29 December 2016
• cavium/octeon plus/cn5860-600bg1521-exp
  * [[:File:octeon plus cn58xx (rev 1.4).pdf|OCTEON CN58XX Processors Product Brief]]
  4 KB (396 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5830-600bg1521-nsp
  * [[:File:octeon plus cn58xx (rev 1.4).pdf|OCTEON CN58XX Processors Product Brief]]
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-800bg1521-nsp
  * [[:File:octeon plus cn58xx (rev 1.4).pdf|OCTEON CN58XX Processors Product Brief]]
  4 KB (419 words) - 16:12, 13 December 2017

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