From WikiChip
EPYC 7282 - AMD
< amd‎ | epyc
Revision as of 11:53, 6 August 2019 by David (talk | contribs) (7282)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Edit Values
no photo (ic).svg
General Info
Microarchitecture
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/epyc/7282&oldid=92972"
Facts about "EPYC 7282 - AMD"
RDF feed
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
clock multiplier20 +
core count16 +
core family23 +
core nameRome +
designerAMD +
die count3 +
familyEPYC +
first announcedAugust 7, 2019 +
first launchedAugust 7, 2019 +
full page nameamd/epyc/7282 +
has locked clock multipliertrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
ldateAugust 7, 2019 +
manufacturerTSMC + and GlobalFoundries +
market segmentServer +
max cpu count2 +
max memory4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) +
microarchitectureZen 2 +
model number7282 +
nameEPYC 7282 +
packageSP3 + and FCLGA-4094 +
part number100-000000078 +
process7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
series7002 +
smp max ways2 +
socketSP3 + and LGA-4094 +
tdp120 W (120,000 mW, 0.161 hp, 0.12 kW) +
technologyCMOS +
thread count32 +
turbo frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +