X704
533MHz X704 Promotional Picture
Developer	Exponential Technology
Manufacturer	Hitachi
Type	Microprocessors
Introduction	October 21, 1996 (announced)
ISA	PowerPC
µarch	X704
Word size	32 bit 4 octets 8 nibbles
Process	500 nm 0.5 μm 5.0e-4 mm
Technology	BiCMOS
Clock	410 MHz-533 MHz
Package	CBGA-359

X704 (stylized as X⁷⁰⁴) was a family of high-performance PowerPC microprocessors announced by Exponential Technology in 1996. At the time, these chips ran over three times the clock rate as Motorola's/IBM's or Intel's (albeit not as fast in direct performance). Exponential experienced a few bumps in the road during the final stages delaying the final product and hindering their initial performance which did not meet their expected performance and power goals. Additionally, the X704 was caught in the crossfire between Apple and Macintosh clone manufacturers, which ultimately sealed their fate (See § History).

History

See also: Exponential Technology

Exponential took on a very ambitious challenge of designing a PowerPC microarchitecture from the ground up that could operate at extremely high clock frequency for the time - 533 MHz. Comparable chips at the time of Exponential founding were operating at only 50-75 MHz max. By 1993 the idea was backed by Apple and their CEO Michael Spindler which became the principal investor of the newly created company, Exponential.

In 1994 Apple and Exponential signed a juint development agreement and later that year they formed an agreement with Hitachi which agreed to manufacture their chip at their BiCMOS foundry. By 1996 with their chip just months away from engineering sample, Apple's CEO, then Gil Amelio extended their agreement to gain exclusive rights to the chip for the first nine months of volume production. The deal included a $5 million prepayment - a payment Apple never delivered.

First samples of the X704 came back running at only 410 MHz, 88% of the expected speed (or 75% of the top tier model). Exponential attributed the issue to a bug in their custom design tools. This pushed back the deliver date to March of 1997. Even then, the chip would have been considerably faster than the fastest chips on the market at the time - Intel's Klamath which ran as high as 233 MHz.

By February of 1997, the X704 was ready - hitachi delivered Exponential over 7,000 410-MHz chip. Apple was in a fairly bad shape at the time, with massive layoffs on the horizon; just a month later they acquired NEXT software for $430 million, bringing back Steve Jobs as an advisers and replacing key Apple upper management. Around the same time, Exponential displayed an X704-based machine to journalists at the LA Dreamworks Studios, running complex 3D animations and wowing the audiences. Following Exponential progress IBM announced a new chip: the Mach 5; the chip didn't actually arrive until 5 months later. While clocked at only 250 MHz, its considerably larger cache and wider datapath promised to match X704's performance. IBM chip was also to be manufactured on their new 0.25 µm process (compared to X704's 0.5 µm). Apple eventually went with IBM's chip but only for a short time as by 1998 they went over to PPC 750 series. In a meeting that took place on March 3 1997 Apple told Exponential that with the lay off of thousands employees they will no longer be able to design a system around the X704 chip. This decision had devastating consequences for Exponential which relied on Apple's deal which would've meant hundreds of millions of dollars in revenue.

Running out of cash, as a last resort, Exponential attempted to close a number of deals with a number of Macintosh clone manufacturers. Exponential had deals on the table with companies such as Umax Computer Corporation, Power Computing Corporation, and MaxxBoxx. Clone deals where on condition Apple would modify their ROM. In mid-April Apple agreed to provide clones with a modified ROM but at higher charge (supposedly proportional to the processor speed used).

On April 17, 1997 Apple cancelled their existing contract with Exponential, invoking the 'design flaw' clause citing the slower clock speed as the reason. Under the contract Apple was required to pay $1.4 million cancellation fee. The $1.4 was never paid; money that would have more than likely kept Exponential going for a fair mount of time. As a last straw; Apple never delivered the promised modified ROM.

The likely intentional final steps by Apple to block any and all clones from getting their hand at the X704 halted any sale deal Exponential had. On May 8 Exponential ended up laying off 25% of their engineers. After additional attempts by Exponential to collect on the cancellation fees Exponential finally shut down their development center in San Jose on May 15.

On September 1 1997, Exponential sold their X704 patent portfolio, which amounted to over 50 patents, to S3 Inc for around $12M. Many of the technologies in these patents were used in Intel's Pentium II processors. On December 1998 S3 Inc and Intel announced a 10-year patent cross-licensing agreement which gave Intel access to much of Exponential's original technology.

Members

X704 Processors
Model	Announced	Launched	Frequency
X704-410		March 1997	410 MHz 0.41 GHz 410,000 kHz
X704-466	7 January 1997		466 MHz 0.466 GHz 466,000 kHz
X704-500	7 January 1997		500 MHz 0.5 GHz 500,000 kHz
X704-533	7 January 1997		533 MHz 0.533 GHz 533,000 kHz
Count: 4

Architecture

Main article: X704 Microarchitecture

The X704 was an ambitious project for any company let alone a brand new start up. Many of the design tools were inadequate for the task and required Exponential to developed many new tools in-house including a custom standard cell library. The final product was a PowerPC 60x-compatible, IEEE 1149.1-compliant, and IEEE 754-compliant microprocessor operating at over 400 MHz supporting a bus at up to 100 MHz.

The microprocessor itself was rather unique for its time, taking advantage of Hitachi's 0.5 µm BiCMOS process technology. The chip was designed on a a six-metal layer process - upper five layers can be used for global routing and M1 is reserved for local routing. The final microarchitecture had a total of 2,700,000 transistors consisting of 2,000,000 CMOS and 700,000 Bipolar transistors.

The on-die cache was made of a separate 2 kB L1$ and a unified 32 kB L2$. The pipeline consisted of a shallow six-stage superscalar with in-order execution. At full throughput the design allows for a 3-way pipeline - capable of issuing 1 arithmetic (either integer or floating point, but not both), a single load/store operation, and a branch instruction.

Die Shot

Documents

Manuals

• X704 Technical Summary, 1996

Papers

• C. A. Maier et al., "A 533-MHz BiCMOS superscalar RISC microprocessor," in IEEE Journal of Solid-State Circuits, vol. 32, no. 11, pp. 1625-1634, Nov 1997. doi: 10.1109/4.641683