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Xeon Gold 6126 - Intel
Edit Values | |
Xeon Gold 6126 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 6126 |
Part Number | CD8067303405900 |
S-Spec | SR3B3 QN39 (QS), QMRY (QS) |
Market | Server |
Introduction | April 25, 2017 (announced) July 11, 2017 (launched) |
Release Price | $1776.00 |
Shop | Amazon |
General Specs | |
Family | Xeon Gold |
Series | 6000 |
Locked | Yes |
Frequency | 2,600 MHz |
Turbo Frequency | 3,700 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 26 |
CPUID | 0x50654 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Skylake SP |
Core Family | 6 |
Core Stepping | H0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 768 GiB |
Multiprocessing | |
Max SMP | 4-Way (Multiprocessor) |
Electrical | |
TDP | 125 W |
Tcase | 0 °C – 86 °C |
TDTS | 0 °C – 100 °C |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Succession | |
Xeon Gold 6126 is a 64-bit dodeca-core x86 multi-socket high performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6126, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.6 GHz with a TDP of 125 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache
- Main article: Skylake § Cache
The Xeon Gold 6126 features a considerably larger non-default 19.25 MiB of L3, a size that would normally be found on a 14-core part.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Frequencies
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | ||
Normal | 2,600 MHz | 3,700 MHz | 3,700 MHz | 3,500 MHz | 3,500 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz |
AVX2 | 2,200 MHz | 3,600 MHz | 3,600 MHz | 3,400 MHz | 3,400 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 3,300 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz | 2,900 MHz |
AVX512 | 1,700 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,600 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz | 2,300 MHz |
Benchmarks
Test: SPEC CPU2017
Tested: 2017-10-15 14:10:09-0400
Chips: 2, Cores: 24, Threads: 24
Tested: 2017-10-15 14:10:09-0400
Chips: 2, Cores: 24, Threads: 24
Vendor: HPE
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECspeed2017_fp_base: 94.7
Test: SPEC CPU2017
Tested: 2017-10-15 15:27:17-0400
Chips: 2, Cores: 24, Threads: 24
Tested: 2017-10-15 15:27:17-0400
Chips: 2, Cores: 24, Threads: 24
Vendor: HPE
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECspeed2017_int_base: 8.63
Test: SPEC CPU2017
Tested: 2017-10-09 05:16:12-0400
Chips: 2, Cores: 24, Copies: 48
Tested: 2017-10-09 05:16:12-0400
Chips: 2, Cores: 24, Copies: 48
Vendor: HPE
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECrate2017_int_base: 141
Test: SPEC CPU2017
Tested: 2017-10-09 09:53:49-0400
Chips: 2, Cores: 24, Copies: 48
Tested: 2017-10-09 09:53:49-0400
Chips: 2, Cores: 24, Copies: 48
Vendor: HPE
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECrate2017_fp_base: 149
Test: SPEC CPU2017
Tested: 2017-10-06 15:05:04-0400
Chips: 2, Cores: 24, Threads: 24
Tested: 2017-10-06 15:05:04-0400
Chips: 2, Cores: 24, Threads: 24
Vendor: HPE
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECspeed2017_fp_base: 94.2
Test: SPEC CPU2017
Tested: 2017-10-23 03:30:18-0400
Chips: 2, Cores: 24, Copies: 48
Tested: 2017-10-23 03:30:18-0400
Chips: 2, Cores: 24, Copies: 48
Vendor: HPE
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECrate2017_int_base: 136
Test: SPEC CPU2017
Tested: 2017-10-06 11:59:24-0400
Chips: 2, Cores: 24, Threads: 24
Tested: 2017-10-06 11:59:24-0400
Chips: 2, Cores: 24, Threads: 24
Vendor: HPE
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL380 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECspeed2017_int_base: 8.63
Test: SPEC CPU2017
Tested: 2017-10-23 08:07:59-0400
Chips: 2, Cores: 24, Copies: 48
Tested: 2017-10-23 08:07:59-0400
Chips: 2, Cores: 24, Copies: 48
Vendor: HPE
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
System: ProLiant DL360 Gen10 (2.60 GHz, Intel Xeon Gold 6126)
SPECrate2017_fp_base: 144
Facts about "Xeon Gold 6126 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Gold 6126 - Intel#io +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel +, Xeon Gold 6126 - Intel + and Xeon Gold 6126 - Intel + |
base frequency | 2,600 MHz (2.6 GHz, 2,600,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Lewisburg + |
clock multiplier | 26 + |
core count | 12 + |
core family | 6 + |
core name | Skylake SP + |
core stepping | H0 + |
cpuid | 0x50654 + |
designer | Intel + |
family | Xeon Gold + |
first announced | April 25, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon gold/6126 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 19.25 MiB (19,712 KiB, 20,185,088 B, 0.0188 GiB) + |
ldate | July 11, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 359.15 K (86 °C, 186.8 °F, 646.47 °R) + |
max cpu count | 4 + |
max dts temperature | 100 °C + |
max memory | 786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
microarchitecture | Skylake (server) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min dts temperature | 0 °C + |
model number | 6126 + |
name | Xeon Gold 6126 + |
package | FCLGA-3647 + |
part number | CD8067303405900 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 1,776.00 (€ 1,598.40, £ 1,438.56, ¥ 183,514.08) + |
s-spec | SR3B3 + |
s-spec (qs) | QN39 + and QMRY + |
series | 6000 + |
smp max ways | 4 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2666 + |
tdp | 125 W (125,000 mW, 0.168 hp, 0.125 kW) + |
technology | CMOS + |
thread count | 24 + |
turbo frequency (1 core) | 3,700 MHz (3.7 GHz, 3,700,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |