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Cortex-A72 - Microarchitectures - ARM
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Cortex-A72 µarch | |
General Info | |
Arch Type | CPU |
Designer | ARM Holdings |
Manufacturer | TSMC |
Introduction | April 23, 2015 |
Succession | |
Cortex-A72 (codename Maya) is the successor to the Cortex-A57, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A72, which implemented the ARMv8 ISA, is the a performant core which is often combined with a number of lower power cores (e.g. Cortex-A53) in a big.LITTLE configuration to achieve better energy/performance.
Contents
Architecture
Key changes from Cortex-A57
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Block Diagram
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Memory Hierarchy
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Die
MediaTek Helio X20
- TSMC 20 nm process
- 100 mm² die size
- Quad-core ULP Cortex-A53
- ~21.81 mm² per cluster
- ~4.23 mm² per core
- ~21.81 mm² per cluster
- Quad-core efficient Cortex-A53
- ~29.73 mm² per cluster
- ~5.41 mm² per core
- ~29.73 mm² per cluster
- Dual-core High-performance Cortex-A72 + 1 MiB L2
- ~27.36 mm² per cluster
- ~ 9.60 mm² per core
- ~ 7.50 mm² for 1 MiB L2
- ~27.36 mm² per cluster
Facts about "Cortex-A72 - Microarchitectures - ARM"
codename | Cortex-A72 + |
designer | ARM Holdings + |
first launched | April 23, 2015 + |
full page name | arm holdings/microarchitectures/cortex-a72 + |
instance of | microarchitecture + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Cortex-A72 + |