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Hi1610 - HiSilicon
Edit Values | |
Hi1610 | |
General Info | |
Designer | HiSilicon, ARM Holdings |
Manufacturer | TSMC |
Model Number | Hi1610 |
Market | Server |
General Specs | |
Family | Hi16xx |
Microarchitecture | |
ISA | ARMv8 (ARM) |
Transistors | CMOS |
Word Size | 64 bit |
Cores | 16 |
Threads | 16 |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Facts about "Hi1610 - HiSilicon"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Hi1610 - HiSilicon#pcie + |
base frequency | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
core count | 16 + |
core name | Cortex-A57 + |
designer | HiSilicon + and ARM Holdings + |
family | Hi16xx + |
first announced | 2015 + |
first launched | 2015 + |
full page name | hisilicon/kunpeng/hi1610 + |
has ecc memory support | true + |
instance of | microprocessor + |
isa | ARMv8 + |
isa family | ARM + |
l1$ size | 1,280 KiB (1,310,720 B, 1.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 786,432 KiB (805,306,368 B, 768 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
ldate | 2015 + |
manufacturer | TSMC + |
market segment | Server + |
max cpu count | 1 + |
max memory | 262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) + |
max memory bandwidth | 55.63 GiB/s (56,965.12 MiB/s, 59.732 GB/s, 59,732.258 MB/s, 0.0543 TiB/s, 0.0597 TB/s) + |
max memory channels | 4 + |
microarchitecture | Cortex-A57 + |
model number | Hi1610 + |
name | Hi1610 + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |
smp max ways | 1 + |
supported memory type | DDR4-1866 + |
technology | CMOS + |
thread count | 16 + |
word size | 64 bit (8 octets, 16 nibbles) + |