From WikiChip
Duron 1300 (Morgan) - AMD
< amd‎ | duron
Revision as of 15:21, 13 December 2017 by ChippyBot (talk | contribs) (Bot: switching template from {{mpu}} to a more generic {{chip}})

Edit Values
Duron 1300
KL AMD Duron Morgan.jpg
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 1300
Part NumberDHD1300AMT1B
MarketDesktop
IntroductionJanuary 21, 2002 (announced)
January 21, 2002 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency1300 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier13
CPUID670
Microarchitecture
MicroarchitectureK7
Core NameMorgan
Core Family6
Core Model7
Core Stepping0
Process180 nm
Transistors25,180,000
TechnologyCMOS
Die105.68 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.75 V ± 0.15 V
TDP60 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

The Duron 1300 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in early 2002. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 1300 MHz with a bus capable of 200 MT/s with a max TDP of 60 W and a typical TDP of 55.2 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:chip features

  • Halt State
  • Sleep State

Documents

DataSheet

Other

Gallery

See also

has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +