-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Celeron J4105
< intel | celeron
| Edit Values | |
| General Info | |
| Microarchitecture |
Facts about "Celeron J4105 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron J4105 - Intel#package + |
| base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
| clock multiplier | 15 + |
| core count | 4 + |
| core name | Gemini Lake + |
| core stepping | B0 + |
| designer | Intel + |
| family | Celeron + |
| first announced | December 11, 2017 + |
| first launched | December 11, 2017 + |
| full page name | intel/celeron/j4105 + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| ldate | December 11, 2017 + |
| main image | |
| manufacturer | Intel + |
| market segment | Desktop + |
| max cpu count | 1 + |
| max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
| microarchitecture | Goldmont Plus + |
| model number | J4105 + |
| name | Celeron J4105 + |
| package | FCBGA-1090 + |
| part number | FH8068003067403 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) + |
| s-spec | SR3S4 + |
| series | 4000 + |
| smp max ways | 1 + |
| tdp | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
| technology | CMOS + |
| thread count | 4 + |
| turbo frequency (1 core) | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |