-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Ice Lake S - Cores - Intel
< intel
Edit Values | ||||||||||||
Ice Lake S | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Introduction | 2018 (announced) | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Ice Lake | |||||||||||
Word Size | 8 octets 64 bit16 nibbles | |||||||||||
Process | 10 nm 0.01 μm 1.0e-5 mm | |||||||||||
Technology | CMOS | |||||||||||
Packaging | ||||||||||||
| ||||||||||||
Succession | ||||||||||||
Ice Lake S (ICL-S) is the code name for Intel's mainstream performance line of processors based on the Ice Lake microarchitecture serving as a successor to Coffee Lake S. These chips are primarily targeted towards desktop performance to value computers, AiOs, and minis. Ice Lake S processors are fabricated on Intel's 2nd generation enhanced 10nm+ process.
Facts about "Ice Lake S - Cores - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Ice Lake S - Cores - Intel#package + |
designer | Intel + |
first announced | 2018 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | Intel + |
microarchitecture | Ice Lake + |
name | Ice Lake S + |
package | FCLGA-1151 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
socket | LGA-1151 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |