Template:mpu Core i9-7900X is a 64-bit deca-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's 14 nm process. The i7-7900X operates at 3.3 GHz with a TDP of 140 W and a Turbo Boost frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2666 memory.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 640 KiB 655,360 B 0.625 MiB L1I$ 320 KiB 327,680 B 0.313 MiB 10x32 KiB 8-way set associative   L1D$ 320 KiB 327,680 B 0.313 MiB 10x32 KiB 8-way set associative write-back L2$ 10 MiB 10,240 KiB 10,485,760 B 0.00977 GiB     10x1 MiB 16-way set associative write-back L3$ 13.75 MiB 14,080 KiB 14,417,920 B 0.0134 GiB     10x1.375 MiB 11-way set associative write-back