Template:mpu Xeon E7-4807 is a 64-bit hexa-core x86 data center microprocessor that supports up to 4 sockets. This first generation (Westmere-based) Xeon E7 processor operates at 1.86 GHz with 95 W TDP but does not support turbo boost technology. This processor supports up to 4 channels of DDR3, supporting up to 2 TB of memory.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 384 KiB 393,216 B 0.375 MiB L1I$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 4-way set associative write-back L1D$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 8-way set associative write-back L2$ 1.5 MiB 1,536 KiB 1,572,864 B 0.00146 GiB     6x256 KiB 8-way set associative write-back L3$ 18 MiB 18,432 KiB 18,874,368 B 0.0176 GiB     6x3 MiB 16-way set associative write-back

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3-800 Supports ECC Yes Max Mem 2 TiB Controllers 1 Channels 4 Max Bandwidth 23.84 GiB/s 24,412.16 MiB/s 25.598 GB/s 25,598.005 MB/s 0.0233 TiB/s 0.0256 TB/s Bandwidth Single 5.96 GiB/s Double 11.92 GiB/s Triple 17.88 GiB/s Quad 23.84 GiB/s