-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Celeron 3755U - Intel
Template:mpu Celeron 3755U is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in early 2015. Operating at 1.7 GHz with a TDP of 15 W and a configurable TDP-down of of 10 W at 600 MHz, this Broadwell-based microprocessor is manufactured on Intel's 14 nm process.
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KiB 65,536 B 0.0625 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 64 KiB 65,536 B 0.0625 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB |
2x256 KiB 8-way set associative (per core, write-back) |
L3$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
2x1 MiB 12-way set associative (shared) |
Facts about "Celeron 3755U - Intel"
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics (Broadwell) + |
integrated gpu base frequency | 100 MHz (0.1 GHz, 100,000 KHz) + |
integrated gpu max frequency | 800 MHz (0.8 GHz, 800,000 KHz) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |