Template:mpu AMD-K6-IIIE+/500ANZ is a 32-bit x86 embedded microprocessor designed by AMD and introduced in late 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.

Cache

Main article: K6-III § Cache

L3$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative
L1D$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative
L2$	256 KB "KB" is not declared as a valid unit of measurement for this property.	1x256 4-way set associative (shared)

Graphics

This SoC has no integrated graphics processing unit.

Features

• Auto-power down state
• Stop clock state
• Halt state