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From WikiChip
K6-III+ - AMD
< amd
| K6-III+ | |
| |
| Marketing Logo | |
| Developer | AMD |
| Manufacturer | AMD |
| Type | Microprocessors |
| Introduction | April 18, 2000 (announced) April 18, 2000 (launch) |
| ISA | IA-32 |
| µarch | K6-III |
| Word size | 32 bit 4 octets
8 nibbles |
| Process | 180 nm 0.18 μm
1.8e-4 mm |
| Technology | CMOS |
| Clock | 450 MHz-550 MHz |
| Package | CPGA-321 |
| Socket | Socket 7, Super Socket 7 |
| Succession | |
| ← | |
| K6-III | |
K6-III+ (K6-III Plus) was a family of mobile microprocessors introduced by AMD in early 2000 as a replacement for the previous generation of K6-III mobile processors. K6-III+ enjoyed higher performance and lower voltage as a result of a die shrink.
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-iii%2B&oldid=24500"
Facts about "K6-III+ - AMD"
| designer | AMD + |
| first announced | April 18, 2000 + |
| first launched | April 18, 2000 + |
| full page name | amd/k6-iii+ + |
| instance of | microprocessor family + |
| instruction set architecture | IA-32 + |
| main designer | AMD + |
| manufacturer | AMD + |
| microarchitecture | K6-III + |
| name | K6-III+ + |
| package | CPGA-321 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |
| socket | Socket 7 + and Super Socket 7 + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |