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From WikiChip
MCST/elbrus-4s
< MCST
Revision as of 04:48, 10 November 2019 by Lllkstlll (talk | contribs) (Lllkstlll moved page MCST/elbrus-4c to MCST/elbrus-4s: english translation (russian C - english S))
Elbrus-4S | |
Developer | MCST |
Type | Microprocessors |
Introduction | 2014 (launch) |
Architecture | Elbrus (VLIW) |
Process | 65 nm 0.065 μm
6.5e-5 mm |
Elbrus-4S (rus. Эльбрус-4С, code designation: 1891ВМ8Я) is an universal multi-core VLIW microprocessor with the Elbrus architecture, developed by the russian company MCST.
The «Elbrus-4S» processor contains 4 cores, level 2 cache memory with a total capacity of 8 megabytes, 3 memory controllers, 3 interprocessor communication channels and an input-output channel. Each processor core executes 23 instructions per cycle. The average power dissipation is 45 watts. The microprocessor is intended for use in personal computers and servers.
Retrieved from "https://en.wikichip.org/w/index.php?title=MCST/elbrus-4s&oldid=94399"
Facts about "MCST/elbrus-4s"
designer | MCST + |
first launched | 2014 + |
full page name | MCST/elbrus-4s + |
instance of | microprocessor family + |
main designer | MCST + |
name | Elbrus-4S + |
process | 65 nm (0.065 μm, 6.5e-5 mm) + |