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Xeon D-1559 - Intel
| Edit Values | |
| Xeon D-1559 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | D-1559 |
| Part Number | GG8067402570801 |
| S-Spec | SR2M5 |
| Market | Server, Embedded |
| Introduction | April, 2016 (announced) April, 2016 (launched) |
| Release Price | $727.00 (tray) |
| Shop | Amazon |
| General Specs | |
| Family | Xeon D |
| Series | D-1500 |
| Locked | Yes |
| Frequency | 1,500 MHz |
| Turbo Frequency | 2,100 MHz (1 core) |
| Bus type | DMI 2.0 |
| Clock multiplier | 15 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Broadwell |
| Platform | Grangeville |
| Core Name | Broadwell DE |
| Core Family | 6 |
| Core Model | 6 |
| Core Stepping | Y0 |
| Process | 14 nm |
| Transistors | 4,700,000,000 |
| Technology | CMOS |
| Die | 306.18 mm² |
| Word Size | 64 bit |
| Cores | 12 |
| Threads | 24 |
| Max Memory | 128 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 45 W |
| OP Temperature | -40 °C – 85 °C |
| Packaging | |
| Package | FCBGA-1667 (FCBGA) |
| Dimension | 37.5 mm × 37.5 mm × 3.557 mm |
| Pitch | 0.7 mm |
| Contacts | 1667 |
Xeon D-1559 is a 64-bit dodeca-core x86 microserver SoC introduced by Intel in mid 2016. The D-1559 is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 1.5 GHz with a TDP of 45 W and a turbo frequency of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
Cache
- Main article: Broadwell § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics
This SoC has no integrated graphics processing unit.
Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Networking
| Networking | |
| SFI interface | Yes |
| KR interface | Yes |
| KR4 interface | No |
| KX interface | Yes |
| KX4 interface | No |
| 10Base-T | No |
| 100Base-T | No |
| 1000Base-T | Yes |
| 10GBase-T | Yes |
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon D-1559 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1559 - Intel#io + |
| back image | |
| base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
| bus type | DMI 2.0 + |
| clock multiplier | 15 + |
| core count | 12 + |
| core family | 6 + |
| core model | 6 + |
| core name | Broadwell DE + |
| core stepping | Y0 + |
| designer | Intel + |
| die area | 306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) + |
| family | Xeon D + |
| first announced | April 2016 + |
| first launched | April 2016 + |
| full page name | intel/xeon d/d-1559 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has locked clock multiplier | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| l3$ description | 16-way set associative + |
| l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
| ldate | April 2016 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + and Embedded + |
| max cpu count | 1 + |
| max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
| max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| max operating temperature | 85 °C + |
| max pcie lanes | 8 + |
| microarchitecture | Broadwell + |
| min operating temperature | -40 °C + |
| model number | D-1559 + |
| name | Xeon D-1559 + |
| package | FCBGA-1667 + |
| part number | GG8067402570801 + |
| platform | Grangeville + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) + |
| release price (tray) | $ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) + |
| s-spec | SR2M5 + |
| series | D-1500 + |
| smp max ways | 1 + |
| supported memory type | DDR4-2133 + |
| tdp | 45 W (45,000 mW, 0.0603 hp, 0.045 kW) + |
| technology | CMOS + |
| thread count | 24 + |
| transistor count | 4,700,000,000 + |
| turbo frequency (1 core) | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |