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Mars II µarch
General Info
Arch Type	CPU
Designer	Phytium
Manufacturer	TSMC
Introduction	2019
Process	16 nm
Core Configs	64
Pipeline
Type	Superscalar, Pipelined
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Instructions
ISA	ARMv8
Succession
Mars I

Mars II is the successor to Mars I, an ARM server SoC microarchitecture designed by Phytium Technology for the Chinese server market.

Process technology

Mars II is largely a shrink of Mars I, from 28 nm process to a 16 nm FinFET process.

Architecture

Key changes from Mars I

• 16 nm process (from 28 nm)
• 15% higher frequency (2.3 GHz, up from 2 GHz)
• -25% lower power (96 W TDP, down from 120 W)
• Core
  • FTC-662 (from FTC-661/0)
• System memory
  • DDR4 (from DDR3)
  • Higher data rates (2400 MT/s, up from 1600 MT/s)

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Overview

Mars II is Phytium's second-generation many-core server processor based on a custom ARM core. The Mars II is largely a shrink of their first-generation SoC but it does introduce a number of enhancements. Fabricated on a leading-edge 16 nm FinFET process, the new SoC is considerably smaller than the prior die, offers higher frequency, and lower power. Mars II features 64 custom ARMv8.0 cores operating at up to 2.3 GHz for a total of 588.8 GFLOPS. The SoC incorporates high DDR4-2400 memory channels and includes 33 PCIe Gen 3.0 lanes.

Package

Package	FCBGA-3576
Dimensions	61mm x 61mm
Bumps	11916
Contacts	3576

Die

Panel

SoC

• 16 nm process (16FF+) GL
• 1 Poly, 11 Metal layers, RDL
• 6,000,000,000 transistors
• 370 mm² die size