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Knights Landing - Microarchitectures - Intel
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Revision as of 15:36, 19 April 2018 by Ocornoc (talk | contribs) (Fixed another capitalization error)

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Knights Landing µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Process14 nm
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-16, x86-32, x86-64
Succession
Contemporary
Knights Mill

Knights Landing (KNL) is the successor to Knights Corner, a 14 nm many-core microarchitecture designed by Intel for high performance computing.

Process Technology

See also: Broadwell § Process Technology and 14 nm lithography process

Knights Landing is fabricated on Intel's 14 nm process.

Architecture

Key changes from Knights Corner

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New instructions

Knights Landing introduced a number of new instructions:

  • AVX-512, specifically:
    • AVX512F - AVX-512 Foundation
    • AVX512CD - AVX-512 Conflict Detection
    • AVX512PF - Prefetch instructions for gather/scatter
    • AVX512ER - Exponential and Reciprocal Instructions

Die

Die shot of Intel's Xeon Phi, Knights Landing.

  • 14 nm process
  • 682.6 mm² die size
  • 76 CPU cores (sold with maximum 72 enabled cores)
  • 7,100,000,000 transistors

intel xeon phi knightslanding die shot .jpeg

codenameKnights Landing +
designerIntel +
full page nameintel/microarchitectures/knights landing +
instance ofmicroarchitecture +
instruction set architecturex86-16 +, x86-32 + and x86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameKnights Landing +
process14 nm (0.014 μm, 1.4e-5 mm) +