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Xeon D-2146NT - Intel
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Xeon D-2146NT | |||||||
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General Info | |||||||
Designer | Intel | ||||||
Manufacturer | Intel | ||||||
Model Number | D-2146NT | ||||||
Part Number | FH8067303782601 | ||||||
S-Spec | SR3ZR | ||||||
Market | Server, Embedded | ||||||
Introduction | February 7, 2018 (announced) February 7, 2018 (launched) | ||||||
Release Price | $641.00 | ||||||
Shop | Amazon | ||||||
General Specs | |||||||
Family | Xeon D | ||||||
Series | D-2000 | ||||||
Locked | Yes | ||||||
Frequency | 2,300 MHz | ||||||
Turbo Frequency | 3,000 MHz (1 core) | ||||||
Bus type | DMI 3.0 | ||||||
Bus rate | 4 × 8 GT/s | ||||||
Clock multiplier | 23 | ||||||
Microarchitecture | |||||||
ISA | x86-64 (x86) | ||||||
Microarchitecture | Skylake (server) | ||||||
Core Name | Skylake-DE | ||||||
Core Stepping | M1 | ||||||
Process | 14 nm | ||||||
Technology | CMOS | ||||||
MCP | Yes (2 dies) | ||||||
Word Size | 64 bit | ||||||
Cores | 8 | ||||||
Threads | 16 | ||||||
Max Memory | 512 GiB | ||||||
Multiprocessing | |||||||
Max SMP | 1-Way (Uniprocessor) | ||||||
Electrical | |||||||
TDP | 80 W | ||||||
Packaging | |||||||
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Xeon D-2146NT is a 64-bit 8-core high-performance x86 server microprocessor introduced by Intel in early 2018 for the dense server and edge computing market segment. Fabricated on Intel's 14 nm process based on the Skylake microarchitecture, this model operates at 2.3 GHz with a Turbo Boost of up to 3.0 GHz and a TDP of 80 W. The D-2146NT supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Facts about "Xeon D-2146NT - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-2146NT - Intel#package + |
base frequency | 2,300 MHz (2.3 GHz, 2,300,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 23 + |
core count | 8 + |
core name | Skylake-DE + |
core stepping | M1 + |
designer | Intel + |
die count | 2 + |
family | Xeon D + |
first announced | February 7, 2018 + |
first launched | February 7, 2018 + |
full page name | intel/xeon d/d-2146nt + |
has locked clock multiplier | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) + |
ldate | February 7, 2018 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
microarchitecture | Skylake (server) + |
model number | D-2146NT + |
name | Xeon D-2146NT + |
package | FCBGA-2518 + |
part number | FH8067303782601 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 641.00 (€ 576.90, £ 519.21, ¥ 66,234.53) + |
s-spec | SR3ZR + |
series | D-2000 + |
smp max ways | 1 + |
tdp | 80 W (80,000 mW, 0.107 hp, 0.08 kW) + |
technology | CMOS + |
thread count | 16 + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |