From WikiChip
Am186ER–50VI\W - AMD
Am186ER–50VI\W | |||||||||||
Designer | AMD | ||||||||||
Manufacturer | AMD | ||||||||||
Model Number | Am186ER–50VI\W | ||||||||||
Part Number | Am186ER–50VI\W | ||||||||||
Market | Embedded | ||||||||||
Introduction | March 31, 1998 (launch) | ||||||||||
General information | |||||||||||
Family | Am186Ex | ||||||||||
Series | Am186ER | ||||||||||
Frequency | 50 MHz 0.05 GHz
50,000 kHz | ||||||||||
Bus speed | 12.5 MHz 0.0125 GHz
12,500 kHz | ||||||||||
Bus rate | 12.5 MT/s 0.0125 GT/s
12,500 kT/s | ||||||||||
Microarchitecture | |||||||||||
Microarchitecture | 80186 | ||||||||||
Core name | Am186 | ||||||||||
Process | 350 nm 0.35 μm
3.5e-4 mm | ||||||||||
Word size | 16 bit 2 octets
4 nibbles | ||||||||||
Core count | 1 | ||||||||||
Max CPUs | 1 | ||||||||||
Electrical | |||||||||||
Vcore | 3.3 V 33 dV ± 0.3 V
330 cV 3,300 mV | ||||||||||
Tcase | -40 °C 233.15 K – 85 °C-40 °F 419.67 °R 358.15 K
185 °F 644.67 °R | ||||||||||
Tstorage | -65 °C 208.15 K – 125 °C-85 °F 374.67 °R 398.15 K
257 °F 716.67 °R | ||||||||||
SRAM | 32 KB | ||||||||||
Max Memory | 1 MiB 1,024 KiB
1,048,576 B 9.765625e-4 GiB 9.536743e-7 TiB | ||||||||||
Pins | |||||||||||
Pins | 100 | ||||||||||
IRQ lines | 6 | ||||||||||
I/O ports | 32 | ||||||||||
Packaging | |||||||||||
|
Am186ER–50VI\W is a microcontroller designed by AMD. This MCU incorporated the Am186 core which operated at 50 MHz. This model supported all the base features such as 32 general purpose I/O ports, timers, and SSI. Additionally, this MCU also integrates 32 KB SRAM on-die. This model supported industrial temperate range.
Cache
- Main article: 80186 § Cache
Cache Info [Edit Values] | ||
L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics
This chip had no integrated graphics processing unit.
Features
- Industrial temperature range
- Single clock input
- Interrupt Control Unit
- General Purpose DMA (2 independent channels)
- 3 x 16-bit timers
- Watchdog Timer
- UART
- 32x General Purpose IO
- Synchronous Serial Interface
- Watchdog timer can generate NMI or reset
- 6 x external interrupts
- 32 KB SRAM
Documents
Datasheets
- Am186ER; Publication #20732
Manuals
Facts about "Am186ER–50VI\W - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Am186ER–50VI\W - AMD#package_1 + |
base frequency | 50 MHz (0.05 GHz, 50,000 kHz) + |
bus rate | 12.5 MT/s (0.0125 GT/s, 12,500 kT/s) + |
bus speed | 12.5 MHz (0.0125 GHz, 12,500 kHz) + |
core count | 1 + |
core name | Am186 + |
core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
core voltage tolerance | 0.3 V + |
designer | AMD + |
family | Am186Ex + |
first launched | March 31, 1998 + |
full page name | amd/am186ex/am186er–50vi\w + |
instance of | microcontroller + |
l1$ size | 0 KiB (0 B, 0 MiB) + |
l2$ size | 0 MiB (0 KiB, 0 B, 0 GiB) + |
manufacturer | AMD + |
market segment | Embedded + |
max case temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | 80186 + |
min case temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
model number | Am186ER–50VI\W + |
name | Am186ER–50VI\W + |
package | TQFP-100 + |
part number | Am186ER–50VI\W + |
pin count | 100 + |
process | 350 nm (0.35 μm, 3.5e-4 mm) + |
series | Am186ER + |
word size | 16 bit (2 octets, 4 nibbles) + |