Template:mpu K6-III/400AFR is a 32-bit x86 desktop microprocessor designed by AMD and introduced in early 1999. This MPU which was manufactured on a 0.25 µm process, based on K6-III microarchitecture, operated at 400 MHz with a bus of 100 MHz and a multiplier of 4. While default to a 100 MHz bus (Super 7), this model can also operate at the old Socket 7 bus speed of 66 MHz (multiplier of 6). This processors had a maximum power dissipation rating of 18.1 W.

Cache

Main article: K6-III § Cache

L3$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative
L1D$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative
L2$	256 KB "KB" is not declared as a valid unit of measurement for this property.	1x256 4-way set associative (shared)