Template:mpu K6-2/500AFX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB of 100 MHz consumed 20.7 W.

Cache

Main article: K6-2 § Cache

L2$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative
L1D$	32 KB "KB" is not declared as a valid unit of measurement for this property.	1x32 KB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

• Auto-power down state
• Stop clock state

Gallery

• 

Documents

DataSheet

• AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000