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i486DX-50 - Intel
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Template:mpu i486DX-50 was a fourth-generation x86 microprocessor introduced by Intel in 1991. This chip, which is based on the 80486 microarchitecture, operated at 50 MHz. This chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x8 KB 4-way set associative (unified, write-through policy )

Graphics

This chip had no integrated graphics processing unit.

Features

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/80486/486dx-50&oldid=18470"
Facts about "i486DX-50 - Intel"
RDF feed
base frequency50 MHz (0.05 GHz, 50,000 kHz) +
bus rate50 MT/s (0.05 GT/s, 50,000 kT/s) +
bus speed50 MHz (0.05 GHz, 50,000 kHz) +
bus typeFSB +
clock multiplier1 +
core count1 +
core name486DX +
core voltage5 V (50 dV, 500 cV, 5,000 mV) +
core voltage tolerance5% +
cpuid411 + and 413 +
designerIntel +
family80486 +
first launchedJune 24, 1991 +
full page nameintel/80486/486dx-50 +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldateJune 24, 1991 +
main imageFile:CPU Intel 80486DX-50.JPG +
main image captionA80486DX-50, S-Spec SX710 +
manufacturerIntel +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberi486DX-50 +
nameIntel i486DX-50 +
part numberA80486DX-50 +
power dissipation4 W (4,000 mW, 0.00536 hp, 0.004 kW) +
process1,000 nm (1 μm, 0.001 mm) + and 800 nm (0.8 μm, 8.0e-4 mm) +
s-specSX408 +, SX409 +, SX518 +, SX546 +, SX547 +, SX705 +, SX710 + and SXE69 +
s-spec (qs)Q0209 + and Q302 +
series486DX +
smp max ways1 +
technologyCMOS +
transistor count1,200,000 +
word size32 bit (4 octets, 8 nibbles) +