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From WikiChip
Kaby Lake - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Kaby Lake µarch | |
| General Info |
Kaby Lake is Intel's successor to Skylake, a 14 nm process microarchitecture for mainstream desktops, servers, and mobiles. Originally set to be fabricated using 10 nm process, Intel late revised it to 14 nm due to serious delays with Broadwell.
For desktop and mobile, Kaby Lake is branded as 7th Generation Intel Core processors. For server class processors, Intel branded it as Xeon E3 v6, Xeon E5 v6, and Xeon E7 v6.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/kaby_lake&oldid=17685"
Facts about "Kaby Lake - Microarchitectures - Intel"
| codename | Kaby Lake + |
| core count | 2 + and 4 + |
| designer | Intel + |
| first launched | August 30, 2016 + |
| full page name | intel/microarchitectures/kaby lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Kaby Lake + |
| pipeline stages (max) | 19 + |
| pipeline stages (min) | 14 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |