Revision as of 02:22, 10 November 2021

Ryzen 3 3200U is a 64-bit dual-core entry-level performance x86 mobile microprocessor introduced by AMD in early 2019. This processor is based on AMD's Zen+ microarchitecture and is fabricated on a 12 nm process. The 3200U operates at a base frequency of 2.6 GHz with a TDP of 15 W and a Boost frequency of 3.5 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Radeon Vega 3 Graphics operating at up to 1.2 GHz.

This model supports a configurable TDP-down of 12 W and TDP-up of 35 W.

Cache

Main article: Zen+ § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 192 KiB 196,608 B 0.188 MiB L1I$ 128 KiB 131,072 B 0.125 MiB 2x64 KiB 4-way set associative   L1D$ 64 KiB 65,536 B 0.0625 MiB 2x32 KiB 8-way set associative write-back L2$ 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB     2x512 KiB 8-way set associative write-back L3$ 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB     1x4 MiB

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-2400 Supports ECC Yes Max Mem 12 GiB Controllers 2 Channels 2 Max Bandwidth 35.76 GiB/s 36,618.24 MiB/s 38.397 GB/s 38,397.008 MB/s 0.0349 TiB/s 0.0384 TB/s Bandwidth Single 17.88 GiB/s Double 35.76 GiB/s

Expansions

This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0 Max Lanes: 12 Configuration: 1x8+1x4, 2x4+1x4, 1x8+2x2

Graphics

[Edit/Modify IGP Info]

	Integrated Graphics Information
	GPU Radeon Vega 3 Designer AMD Execution Units 3 Max Displays 3 Unified Shaders 192 Burst Frequency 1,200 MHz 1.2 GHz 1,200,000 KHz Output DP, HDMI Standards DirectX 12 OpenGL 4.6 OpenCL 2.2

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 SSE4a Streaming SIMD Extensions 4a AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG SHA SHA Extensions ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute SMT Simultaneous Multithreading AMD-Vi AMD-Vi (I/O MMU virtualization) AMD-V AMD Virtualization SenseMI SenseMI Technology

Die

Further information: Zen+ § Die

• 14 nm process
• 4,940,000,000 transistors
• 209.78 mm² die size