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Difference between revisions of "annapurna labs/graviton/graviton2"
< annapurna labs

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{{chip
 
{{chip
 
|name=AWS Graviton 2
 
|name=AWS Graviton 2
 +
|image=aws graviton 2.png
 +
|image 2=aws graviton 2 (die exposed).png
 
|designer=Annapurna Labs
 
|designer=Annapurna Labs
 
|manufacturer=TSMC
 
|manufacturer=TSMC

Revision as of 19:57, 25 April 2021

Edit Values
AWS Graviton 2
aws graviton 2.png
aws graviton 2 (die exposed).png
General Info
DesignerAnnapurna Labs
ManufacturerTSMC
Model NumberALC12B00
Part NumberALC12B00-AL-A0
MarketServer
IntroductionDecember 3, 2019 (announced)
December 3, 2019 (launched)
General Specs
FamilyAlpine
Frequency2,5000 MHz
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureNeoverse N1
Core NameNeoverse N1
Process7nm
Transistors30,000,000,000
TechnologyCMOS
Word Size64 bit
Cores64
Threads64

AWS Graviton 2 (Alpine ALC12B00) is a 64-core ARMv8 SoC designed by Amazon (Annapurna Labs) for Amazon's own infrastructure. The chip was first unveiled during Amazon's AWS re:Invent 2019 and has been in deployment for user access since early 2020. These processors are offered as part of Amazon's EC2 M6g, C6g, and R6g instances. The Graviton 2 features 64 Neoverse N1 on a mesh, all operating at 2.5 GHz.

Cache

Main article: Neoverse N1 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$8 MiB
8,192 KiB
8,388,608 B
L1I$4 MiB
4,096 KiB
4,194,304 B
64x64 KiB  
L1D$4 MiB
4,096 KiB
4,194,304 B
64x64 KiB  
L2$64 MiB
65,536 KiB
67,108,864 B
0.0625 GiB
  64x1 MiB  
L3$32 MiB
32,768 KiB
33,554,432 B
0.0313 GiB
  32x1 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200
Supports ECCYes
Controllers2
Channels8
Max Bandwidth204.8 GB/s
190.735 GiB/s
195,312.5 MiB/s
204,800 MB/s
0.186 TiB/s
0.205 TB/s
Bandwidth
Single 25.6 GB/s
Double 51.2 GB/s
Quad 102.4 GB/s
Octa 204.8 GB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision4.0
Max Lanes64
Configsx16, x8, x4


Die

  • 7 nm process
  • 30,000,000,000 transistors
  • ~Die size
    • ~456.96 mm²
    • ~22.4 mm x ~20.4 mm
Retrieved from "https://en.wikichip.org/w/index.php?title=annapurna_labs/graviton/graviton2&oldid=98733"
Facts about "AWS Graviton2 - Annapurna Labs (Amazon)"
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AWS Graviton2 - Annapurna Labs (Amazon)#io +
base frequency2,500 MHz (2.5 GHz, 2,500,000 kHz) +
core count64 +
core nameNeoverse N1 +
designerAnnapurna Labs +
die area456.96 mm² (0.708 in², 4.57 cm², 456,960,000 µm²) +
die length22.4 mm (2.24 cm, 0.882 in, 22,400 µm) +
die width20.4 mm (2.04 cm, 0.803 in, 20,400 µm) +
familyGraviton +
first announcedDecember 3, 2019 +
first launchedDecember 3, 2019 +
full page nameannapurna labs/graviton/graviton2 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.2-A +
isa familyARM +
l1$ size8,192 KiB (8,388,608 B, 8 MiB) +
l1d$ size4,096 KiB (4,194,304 B, 4 MiB) +
l1i$ size4,096 KiB (4,194,304 B, 4 MiB) +
l2$ size64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
l3$ size32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldateDecember 3, 2019 +
main imageFile:aws graviton 2.png +
manufacturerTSMC +
market segmentServer +
max memory bandwidth190.735 GiB/s (195,312.5 MiB/s, 204.8 GB/s, 204,800 MB/s, 0.186 TiB/s, 0.205 TB/s) +
max memory channels8 +
max pcie lanes64 +
microarchitectureNeoverse N1 +
model numberALC12B00 +
nameAWS Graviton2 +
part numberALC12B00-AL-A0 +
process7 nm (0.007 μm, 7.0e-6 mm) +
supported memory typeDDR4-3200 +
technologyCMOS +
thread count64 +
transistor count30,000,000,000 +
word size64 bit (8 octets, 16 nibbles) +