From WikiChip
Difference between revisions of "intel/microarchitectures/alder lake"
< intel‎ | microarchitectures

(Alder Lake is successor to Tiger Lake, it's high performance, not low power like Lakefield)
Line 13: Line 13:
 
|successor link=intel/microarchitectures/meteor lake
 
|successor link=intel/microarchitectures/meteor lake
 
}}
 
}}
−
'''Alder Lake''' ('''ADL''') is [[Intel]]'s successor to {{\\|Tiger Lake}}, a [[10 nm]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices.
+
'''Alder Lake''' ('''ADL''') is [[Intel]]'s desktop counterpart to {{\\|Tiger Lake}}, a [[10 nm]] [[microarchitecture]].
  
  

Revision as of 11:53, 7 September 2020

Edit Values
Alder Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2021
Process10 nm
Instructions
ISAx86-64
Succession

Alder Lake (ADL) is Intel's desktop counterpart to Tiger Lake, a 10 nm microarchitecture.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Process Technology

History

Architecture

Key changes from Tiger Lake

  • Core
    • Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/alder_lake&oldid=97825"
Facts about "Alder Lake - Microarchitectures - Intel"
RDF feed
codenameAlder Lake +
core count16 +, 14 +, 10 + and 6 +
designerIntel +
first launched2021 +
full page nameintel/microarchitectures/alder lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameAlder Lake +
process10 nm (0.01 μm, 1.0e-5 mm) + and 7 nm (0.007 μm, 7.0e-6 mm) +
processing element count8P/8E +, 6P/8E +, 2P/8E +, 6P/0E +, 32 EU iGPU + and 96 EU iGPU +