Revision as of 09:42, 4 June 2020

Helio X20 (MT6797) is a 64-bit deca-core ARM LTE system on a chip designed by MediaTek and introduced in early 2016. This SoC incorporates 3 independent clusters of cores (called "Tri-Cluster" by MediaTek) operating at varying degrees of performance designed for certain workloads (operating at 1.4 GHz, 1.85 GHz, and 2.1 GHz) and supports up to 6 GiB of dual-channel LPDDR3-1866 memory. This SoC also incorporates a Mali-T800 MP4 IGP operating at 780 MHz. The chip has a modem supporting LTE User Equipment (UE) category 6.

The Helio X20 is identical to Helio X25 except for the lower clocked A72 cores and the lower clocked GPU.

Architecture

The Helio X20 is designed is composed of 3 individual clusters of CPU cores depending on the level of performance required by the active applications.

• Extreme Performance - 2x Cortex-A72 @ 2.3 GHz
• Performance/Power Balance - 4x Cortex-A53 @ 1.85 GHz
• Power Efficiency - 4x Cortex-A53 @ 1.4 GHz

The three clusters are designed as a modified big.LITTLE configuration.

Architecture slide (note speeds changed since)

Cache

Main articles: Cortex-A53 § Cache and Cortex-A72 § Cache

This section is empty; you can help add the missing info by editing this page.

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type LPDDR3-1600 Supports ECC No Max Mem 6 GiB Controllers 1 Channels 2 Width 32 bit Max Bandwidth 12.8 GB/s (11.92 GiB/s) "GB/s(11.92GiB/s)" is not declared as a valid unit of measurement for this property. Bandwidth Single 6.4 GB/s (5.96 GiB/s) Double 12.8 GB/s (11.92 GiB/s)

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	USB Revision 2.0, 3.0 Ports 8 UART GP I/O Yes

Graphics

[Edit/Modify IGP Info]

	Integrated Graphics Information
	GPU Mali-T880 Designer ARM Holdings Execution Units 4 Frequency 780 MHz 0.78 GHz 780,000 KHz Output DSI Max Resolution DSI 2560x1600 Standards Direct3D 11.2 OpenGL 3.2 OpenCL 1.2 OpenGL ES 3.2 OpenVG 1.1 Vulkan 1.0

Wireless

Wireless Communications
Wi-Fi
WiFi	802.11ac Yes
Cellular
2G	CSD   Yes GSM   Yes GPRS   Yes EDGE   Yes
3G	UMTS TD-SCDMA Yes DC-HSDPA Yes HSUPA Yes CDMA2000 1X Yes 1xEV-DO Yes
4G	LTE Advanced E-UTRAN Yes UE Cat 6

Image

• Integrated image signal processor supports 32 MP
• Supports image stabilization
• Supports video stabilization
• Supports noise reduction
• Supports lens shading correction
• Supports AE/AWB/AF
• Supports edge enhancement
• Supports face detection and visual tracking
• Hardware JPEG encoder

Video

• Video encoding 4K2K @ 30fps with H.265 and HDR
• Video decoding 4K2K @ 30fps, h.264, h.265 / HEVC, MPEG-1/2/4, VC-1, VP-8, VP-9

Audio

• Audio content sampling rates 8kHz to 192kHz
• Audio content sampling format 8-bit/16-bit/24-bit Mono/Stereo
• I2S, PCM
• Encode: AMR-NB, AMR-WB, AAC, OGG, ADPCM
• Decode: WAV, MP3, MP2, AAC, AMR-NB, AMR-WB, MIDI, Vorbis, APE, AAC-plus v1, AAC-plus v2, FLAC, WMA, ADPCM
• 7.1 channel MHL output

Utilizing devices

• Alcatel Flash (2017)
• Doogee F7
• Doogee F7 Pro
• Elephone R9
• Elephone S7
• HomTom HT10
• Kodak Ektra
• LeEco Le 2 Pro X620
• LeEco Le 2 X620
• LeEco Le S3 X626
• Meizu MX6
• Sharp Z2
• Vernee Apollo Lite
• Xiaomi Redmi Note 4
• Xiaomi Redmi Pro
• Leagoo T10
• Lenovo k8 Note
• Chuwi Hi9 Air
• CHAOHENG 10

This list is incomplete; you can help by expanding it.

Die

• TSMC 20 nm process
• 100 mm² die size
• Quad-core ULP Cortex-A53
  • ~21.81 mm² per cluster
    • ~4.23 mm² per core
• Quad-core efficient Cortex-A53
  • ~29.73 mm² per cluster
    • ~5.41 mm² per core
• Dual-core High-performance Cortex-A72 + 1 MiB L2
  • ~27.36 mm² per cluster
    • ~ 9.60 mm² per core
    • ~ 7.50 mm² for 1 MiB L2

Bibliography

• Mair, Hugh T., et al. "4.3 A 20nm 2.5 GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance." Solid-State Circuits Conference (ISSCC), 2016 IEEE International. IEEE, 2016.