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| − | {{intel title|3000}}
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| − | {{ic family
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| − | | title = Intel 3000 Series
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| − | | image = KL intel D3002.jpg
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| − | | caption = Intel D3002, CPU of the 3000 series
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| − | | developer = Intel
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| − | | manufacturer = Intel
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| − | | production start = 1974
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| − | | production end = 1976
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| − | | release = 1974
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| − | | arch = 2-bit bit-slice
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| − | | word = variable
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| − | | proc = 10 μm
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| − | | tech = Schottky TTL
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| − | | clock min = 8.33 MHz
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| − | | clock max = 16.67 MHz
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| − | | package = DIP28
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| − | | package 2 = DIP40
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| − | }}
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| − | The '''Intel 3000''' series is a [[microprocessor family|family]] of [[2-bit architecture|2-bit]] [[bit-slice microprocessor|bit-slice]] [[microprocessor]] components developed by [[Intel]] and introduced in early 1974. The series was made using used [[bipolar]] [[schottky transistor-transistor logic|Schottky transistors]].
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| − | ==2nd source==
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| − | Signetics was the only 2nd source. Later on Czechoslovakian and USSR based clones of the 3000 series were made as well.
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| | | | |
| − | == Design ==
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| − | {{empty section}}
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| − |
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| − | == Family members ==
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| − | {| class="wikitable"
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| − | ! colspan="2" | Family Members
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| − | |-
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| − | ! Part !! Description
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| − | |-
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| − | | {{\|3001}} || Microprogram control unit
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| − | |-
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| − | | {{\|3002}} || CPU
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| − | |-
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| − | | {{\|3003}} || Carry-lookahead adder
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| − | |-
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| − | | {{\|3205}} || 1 of 8 binary decoder
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| − | |-
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| − | | {{\|3207}} || Quad Bipolar-to-MDS Level Shifter and Driver
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| − | |-
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| − | | {{\|3208}} || Hex Sense Amplifier for MOS Memories
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| − | |-
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| − | | {{\|3210}} || TTL-to-MOS Level Shifter and High Voltage Clock Driver
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| − | |-
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| − | | {{\|3211}} || ECL-to-MOS Level Shifter and High Voltage Clock Driver
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| − | |-
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| − | | {{\|3212}} || Multimode latch buffer
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| − | |-
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| − | | {{\|3214}} || Priority interrupt unit
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| − | |-
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| − | | {{\|3216}} || Noninverting bidirectional bus driver
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| − | |-
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| − | | {{\|3222}} || Refresh Controller for 4K NMOS DRAMs
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| − | |-
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| − | | {{\|3226}} || Inverting bidirectional bus driver
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| − | |-
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| − | | {{\|3232}} || Address Multiplexer and Refresh Counter for 4K DRAMs
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| − | |-
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| − | | {{\|3235}} || Quad Bipolar-to-MOS Level Shifter and Drive
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| − | |-
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| − | | {{\|3242}} || Address Multiplexer and Refresh Counter for 16K DRAMs
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| − | |-
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| − | | {{\|3245}} || Quad Bipolar TTL-to-MOS Level Shifter and Driver for 4K
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| − | |-
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| − | | {{\|3246}} || Quad Bipolar ECL-to-MOS Level Shifter and Driver for 4K
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| − | |-
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| − | | {{\|3404}} || High-performance 6-bit Latch
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| − | |-
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| − | | {{\|3408}} || Hex Sense Amp and Latch for MOS Memories
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| − | |-
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| − | | {{\|3601}} || 256x4-bit programable read-only memory
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| − | |-
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| − | | {{\|3604}} || 512x8·bit programable read-only memory
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| − | |-
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| − | | {{\|3301A}} || 256x4-bit read·only memory
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| − | |-
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| − | | {{\|3304A}} || 512x8-bit read-only memory
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| − | |-
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| − | |}
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| − |
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| − | == Systems ==
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| − | * [[decision data/system/4|Decisions Data System/4]], 3000 series used for the [[coprocessor]]
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| − | * The Signetics' 8080 Emulator was constructed using the 3000 series
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| − |
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| − | == Documents ==
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| − | * [[:File:1975 Intel Data Catalog.pdf|1975 Intel Data Catalog]], 3000 Series starts on page 6-53
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