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Difference between revisions of "arm holdings/microarchitectures/mlp"
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|manufacturer 2=Samsung | |manufacturer 2=Samsung | ||
|manufacturer 3=UMC | |manufacturer 3=UMC | ||
| − | |introduction= | + | |introduction=2018 |
|process=16 nm | |process=16 nm | ||
|process 2=7 nm | |process 2=7 nm | ||
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|processing elements 4=16 | |processing elements 4=16 | ||
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| − | '''Machine Learning Processor''' ('''MLP''') is a first-generation [[neural processor]] microarchitecture designed by [[Arm]] for embedded and mobile SoCs. | + | '''Machine Learning Processor''' ('''MLP''') is a first-generation [[neural processor]] microarchitecture designed by [[Arm]] for embedded and mobile SoCs. This microarchitecture is designed as a synthesizable NPU IP and is sold to other semiconductor companies to be implemented in their own chips. |
| + | |||
| + | == Process technology == | ||
| + | Although the MLP is designed as a synthesizable IP, it has been specifically tuned for the [[16 nanometer]] and [[7 nanometer]] [[technology node|nodes]]. | ||
| + | |||
| + | == Release date == | ||
| + | Arm officially released the MLP under the {{armh|Ethos}} family in late 2019. | ||
| + | |||
| + | == Architecture == | ||
| + | === Block diagram === | ||
| + | {{empty section}} | ||
| + | |||
| + | == Overview == | ||
| + | {{empty section}} | ||
| + | |||
| + | == See also == | ||
| + | * {{armh|Ethos}} | ||
| + | * {{intel|Spring Hill|l=arch}} | ||
Revision as of 02:39, 2 February 2020
| Edit Values | |
| MLP µarch | |
| General Info | |
| Arch Type | NPU |
| Designer | Arm Holdings |
| Manufacturer | TSMC, Samsung, UMC |
| Introduction | 2018 |
| Process | 16 nm, 7 nm |
| PE Configs | 4, 8, 12, 16 |
Machine Learning Processor (MLP) is a first-generation neural processor microarchitecture designed by Arm for embedded and mobile SoCs. This microarchitecture is designed as a synthesizable NPU IP and is sold to other semiconductor companies to be implemented in their own chips.
Process technology
Although the MLP is designed as a synthesizable IP, it has been specifically tuned for the 16 nanometer and 7 nanometer nodes.
Release date
Arm officially released the MLP under the Ethos family in late 2019.
Architecture
Block diagram
 |
This section is empty; you can help add the missing info by editing this page. |
Overview
| |
This section is empty; you can help add the missing info by editing this page. |
See also
| codename | MLP + |
| designer | Arm Holdings + |
| first launched | 2018 + |
| full page name | arm holdings/microarchitectures/mlp + |
| instance of | microarchitecture + |
| manufacturer | TSMC +, Samsung + and UMC + |
| name | MLP + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + and 7 nm (0.007 μm, 7.0e-6 mm) + |
| processing element count | 4 +, 8 +, 12 + and 16 + |
