Semiconductor & Computer Engineering
From WikiChip
Property:io pcie max lanes
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(max lanes) |
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Latest revision as of 13:47, 27 December 2019
This is a number property representing the maximum number of PCIe lanes that are directly going to the chip in context. This number DOES NOT include lanes that come from auxiliary chips such as the southbridge. Note that this number usually refers to the number of usable PCIe as opposed to an absolute max as on some platforms (e.g., Intel's DMI 1/2/3) a set number of lanes are reserved for the chipset.
- Note: this property is currently a (newer) duplicate of Property:max pcie lanes
IO Subobject[edit]
- PCIe
- Property:io pcie max lanes
- Property:io pcie revision
- Property:io pcie config
Pages using the property "io pcie max lanes"
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Facts about "io pcie max lanes"
| Has type "Has type" is a predefined property that describes the datatype of a property and is provided by Semantic MediaWiki. | Number + |