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Difference between revisions of "intel/microarchitectures/spring hill"
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{{intel title|Spring Hill|l=arch}} | {{intel title|Spring Hill|l=arch}} | ||
− | {{microarchitecture}} | + | {{microarchitecture |
+ | |atype=NPU | ||
+ | |name=Spring Hill | ||
+ | |designer=Intel | ||
+ | |manufacturer=Intel | ||
+ | |introduction=May, 2019 | ||
+ | |process=10 nm | ||
+ | |cores=2 | ||
+ | |processing elements=8 | ||
+ | |processing elements 2=10 | ||
+ | |processing elements 3=12 | ||
+ | |l3=3 MiB | ||
+ | |l3 per=Slice | ||
+ | }} | ||
'''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. Spring Hill was developed by the Israel Haifa Development Center (IDC). | '''Spring Hill''' is a [[10 nm]] microarchitecture designed by [[Intel]] for their [[inference]] [[neural processors]]. Spring Hill was developed by the Israel Haifa Development Center (IDC). | ||
Revision as of 15:32, 15 October 2019
Edit Values | |
Spring Hill µarch | |
General Info | |
Arch Type | NPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | May, 2019 |
Process | 10 nm |
Core Configs | 2 |
PE Configs | 8, 10, 12 |
Cache | |
L3 Cache | 3 MiB/Slice |
Spring Hill is a 10 nm microarchitecture designed by Intel for their inference neural processors. Spring Hill was developed by the Israel Haifa Development Center (IDC).
Spring Hill-based products are branded as the NNP-I 1000 series.
Contents
Process technology
Spring Hill NPUs are fabricated on Intel's 10 nm process.
Architecture
This section is empty; you can help add the missing info by editing this page. |
Block Diagram
SoC Overview
This section is empty; you can help add the missing info by editing this page. |
Sunny Cove Core
See Sunny Cove § Block diagram.
Inference Engine (ICE)
This section is empty; you can help add the missing info by editing this page. |
Memory Organization
This section is empty; you can help add the missing info by editing this page. |
Overview
This section is empty; you can help add the missing info by editing this page. |
Inference Engine (ICE)
This section is empty; you can help add the missing info by editing this page. |
Board
This section is empty; you can help add the missing info by editing this page. |
Die
- 10 nm process
- 8,500,000,000 transistors
- 239 mm² die size
Facts about "Spring Hill - Microarchitectures - Intel"
codename | Spring Hill + |
core count | 2 + |
designer | Intel + |
first launched | May 2019 + |
full page name | intel/microarchitectures/spring hill + |
instance of | microarchitecture + |
manufacturer | Intel + |
name | Spring Hill + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
processing element count | 8 +, 10 + and 12 + |