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m (More editing)
(→‎DVFS table for Stepping B0)
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== DVFS table for Stepping B0 ==
 
== DVFS table for Stepping B0 ==
  
−
Big cores:<br />
+
=== Big cores ===
 +
{| class="wikitable"
 +
|-
 +
! Mode !! Frequency !! Core Vdd !! SRAM Vdd
 +
|-
 +
| mode89 || 756 MHz || 672 mV || 800 mV
 +
|-
 +
| mode90 || 1056 MHz || 708 mV || 800 mV
 +
|-
 +
| mode91 || 1356 MHz || 797 mV || 800 mV
 +
|-
 +
| mode92 || 1644 MHz || 884 mV || 884 mV
 +
|-
 +
| mode93 || 1944 MHz || 971 mV || 971 mV
 +
|-
 +
| mode94 || 2244 MHz || 1062 mV || 1062 mV
 +
|-
 +
| mode95 || 2400 MHz || 1062 mV || 1062 mV
 +
|}
  
−
cpu mode89, freq:  756 MHz, vdd_cpu:  672 mV, vdd_cpu_sram:  800 mV<br />
+
=== Little cores ===
−
cpu mode90, freq: 1056 MHz, vdd_cpu:  708 mV, vdd_cpu_sram:  800 mV<br />
+
{| class="wikitable"
−
cpu mode91, freq: 1356 MHz, vdd_cpu:  797 mV, vdd_cpu_sram:  800 mV<br />
+
|-
−
cpu mode92, freq: 1644 MHz, vdd_cpu:  884 mV, vdd_cpu_sram:  884 mV<br />
+
! Mode !! Frequency !! Core Vdd !! SRAM Vdd
−
cpu mode93, freq: 1944 MHz, vdd_cpu:  971 mV, vdd_cpu_sram:  971 mV<br />
+
|-
−
cpu mode94, freq: 2244 MHz, vdd_cpu: 1062 mV, vdd_cpu_sram: 1062 mV<br />
+
| mode188 || 396 MHz || 581 mV || 800 mV
−
cpu mode95, freq: 2400 MHz, vdd_cpu: 1062 mV, vdd_cpu_sram: 1062 mV<br />
+
|-
 +
| mode189 || 732 MHz || 622 mV || 800 mV
 +
|-
 +
| mode190 || 1092 MHz || 768 mV || 800 mV
 +
|-
 +
| mode191 || 1440 MHz || 912 mV || 912 mV
 +
|-
 +
| mode192 || 1800 MHz || 1062 mV || 1062 mV
 +
|}
  
−
Little cores:<br />
+
=== GPU ===
 +
{| class="wikitable"
 +
|-
 +
! Mode !! Frequency !! GPU Vdd !! SRAM Vdd
 +
|-
 +
| mode2 || 440 MHz || 700 mV || 800 mV
 +
|-
 +
| mode4 || 630 MHz || 800 mV || 800 mV
 +
|-
 +
| mode5 || 756 MHz || 881 mV || 881 mV
 +
|-
 +
| mode6 || 852 MHz || 950 mV || 950 mV
 +
|-
 +
| mode7 || 1008 MHz || 1060 mV || 1060 mV
 +
|-
 +
| mode101 || 378 MHz || 672 mV || 800 mV
 +
|-
 +
| mode111 || 378 MHz || 672 mV || 800 mV
 +
|}
  
−
cpu mode188, freq:  396 MHz, vdd_cpu:  581 mV, vdd_cpu_sram:  800 mV<br />
+
=== SoC ===
−
cpu mode189, freq:  732 MHz, vdd_cpu:  622 mV, vdd_cpu_sram:  800 mV<br />
+
{| class="wikitable"
−
cpu mode190, freq: 1092 MHz, vdd_cpu:  768 mV, vdd_cpu_sram:  800 mV<br />
+
|-
−
cpu mode191, freq: 1440 MHz, vdd_cpu:  912 mV, vdd_cpu_sram:  912 mV<br />
+
! Mode !! SoC Vdd !! Vdd Fixed !! SRAM Low
−
cpu mode192, freq: 1800 MHz, vdd_cpu: 1062 mV, vdd_cpu_sram: 1062 mV<br />
+
|-
−
 
+
| mode1 || 672 mV ||900 mV || 800 mV
−
gpu mode2, freq:  440 MHz, vdd_gpu:  700 mV, vdd_gpu_sram:  800 mV<br />
+
|-
−
gpu mode4, freq:  630 MHz, vdd_gpu:  800 mV, vdd_gpu_sram:  800 mV<br />
+
| mode2 || 800 mV || 900 mV || 800 mV
−
gpu mode5, freq:  756 MHz, vdd_gpu:  881 mV, vdd_gpu_sram:  881 mV<br />
+
|}
−
gpu mode6, freq:  852 MHz, vdd_gpu:  950 mV, vdd_gpu_sram:  950 mV<br />
 
−
gpu mode7, freq: 1008 MHz, vdd_gpu: 1060 mV, vdd_gpu_sram: 1060 mV<br />
 
−
gpu mode101, freq:  378 MHz, vdd_gpu:  672 mV, vdd_gpu_sram:  800 mV<br />
 
−
gpu mode111, freq:  378 MHz, vdd_gpu:  672 mV, vdd_gpu_sram:  800 mV<br />
 
−
 
 
−
soc mode1, vdd_soc:  672 mV, vdd_fixed:  900 mV, vdd_low:  800 mV<br />
 
−
soc mode2, vdd_soc:  800 mV, vdd_fixed:  900 mV, vdd_low:  800 mV<br />
 

Revision as of 08:19, 8 August 2019

Edit Values
A10 Fusion
General Info
DesignerApple
ManufacturerTSMC
Model NumberA10 Fusion
Part NumberT8010
MarketMobile, Embedded
IntroductionSeptember 7, 2016 (announced)
September 16, 2016 (launched)
General Specs
FamilyAx
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureHurricane, Zephyr
Core NameHurricane, Zephyr
Process16 nm
TechnologyCMOS
Die125 mm²
Word Size64 bit
Cores4
Threads2
Multiprocessing
Max SMP1-Way (Uniprocessor)

A10 Fusion, also known as Apple H9P and codenamed Cayman is a 64-bit quad-core ARM performance mobile system on a chip introduced by Apple in late 2016 as a successor to the A9.

Utilizing devices

  • iPhone 7
  • iPhone 7 Plus
  • iPad 2018
  • iPod Touch 2019 (7th Generation)

This list is incomplete; you can help by expanding it.

DVFS table for Stepping B0

Big cores

Mode Frequency Core Vdd SRAM Vdd
mode89 756 MHz 672 mV 800 mV
mode90 1056 MHz 708 mV 800 mV
mode91 1356 MHz 797 mV 800 mV
mode92 1644 MHz 884 mV 884 mV
mode93 1944 MHz 971 mV 971 mV
mode94 2244 MHz 1062 mV 1062 mV
mode95 2400 MHz 1062 mV 1062 mV

Little cores

Mode Frequency Core Vdd SRAM Vdd
mode188 396 MHz 581 mV 800 mV
mode189 732 MHz 622 mV 800 mV
mode190 1092 MHz 768 mV 800 mV
mode191 1440 MHz 912 mV 912 mV
mode192 1800 MHz 1062 mV 1062 mV

GPU

Mode Frequency GPU Vdd SRAM Vdd
mode2 440 MHz 700 mV 800 mV
mode4 630 MHz 800 mV 800 mV
mode5 756 MHz 881 mV 881 mV
mode6 852 MHz 950 mV 950 mV
mode7 1008 MHz 1060 mV 1060 mV
mode101 378 MHz 672 mV 800 mV
mode111 378 MHz 672 mV 800 mV

SoC

Mode SoC Vdd Vdd Fixed SRAM Low
mode1 672 mV 900 mV 800 mV
mode2 800 mV 900 mV 800 mV
Retrieved from "https://en.wikichip.org/w/index.php?title=apple/ax/a10&oldid=93321"
Facts about "A10 Fusion - Apple"
RDF feed
core count4 +
core nameHurricane + and Zephyr +
designerApple +
die area125 mm² (0.194 in², 1.25 cm², 125,000,000 µm²) +
familyAx +
first announcedSeptember 7, 2016 +
first launchedSeptember 16, 2016 +
full page nameapple/ax/a10 +
instance ofmicroprocessor +
isaARMv8 +
isa familyARM +
ldateSeptember 16, 2016 +
manufacturerTSMC +
market segmentMobile + and Embedded +
max cpu count1 +
microarchitectureHurricane + and Zephyr +
model numberA10 Fusion +
nameA10 Fusion +
part numberT8010 +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways1 +
technologyCMOS +
thread count2 +
used byiPhone 7 +, iPhone 7 Plus +, iPad 2018 + and iPod Touch 2019 (7th Generation) +
word size64 bit (8 octets, 16 nibbles) +