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Difference between revisions of "intel/microarchitectures/comet lake"
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'''Comet Lake''' ('''CML''') is a planned [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}} and {{\\|Whiskey Lake}} for desktops, high-performance mobile devices, and ultra-low power mobile devices. | '''Comet Lake''' ('''CML''') is a planned [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}} and {{\\|Whiskey Lake}} for desktops, high-performance mobile devices, and ultra-low power mobile devices. | ||
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Revision as of 23:59, 21 May 2019
| Edit Values | |
| Comet Lake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Process | 14 nm |
| Core Configs | 4 |
| Pipeline | |
| Type | Superscalar, Superpipeline |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Stages | 14-19 |
| Decode | 5-way |
| Instructions | |
| ISA | x86-64 |
| Extensions | MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX |
| Cache | |
| L1I Cache | 32 KiB/core 8-way set associative |
| L1D Cache | 32 KiB/core 8-way set associative |
| L2 Cache | 256 KiB/core 4-way set associative |
| L3 Cache | 2 MiB/core Up to 16-way set associative |
| L4 Cache | 128 MiB/package on Iris Pro GPUs only |
| Cores | |
| Core Names | Comet Lake U, Comet Lake S |
| Succession | |
Comet Lake (CML) is a planned microarchitecture designed by Intel as a successor to Coffee Lake and Whiskey Lake for desktops, high-performance mobile devices, and ultra-low power mobile devices.
Contents
Codenames
| Core | Abbrev | Description | Graphics | Target |
|---|---|---|---|---|
| Comet Lake S | CML-S | Mainstream performance | GT2 | Desktop performance to value, AiOs, and minis |
| Comet Lake U | CML-U | Ultra-low power | GT2 | Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
Brands
Intel released Coffee Lake under 3 main brand families:
| Logo | Family | General Description | Differentiating Features | |||||
|---|---|---|---|---|---|---|---|---|
| Cores | HT | AVX | AVX2 | TBT | ECC | |||
 |
Core i3 | Low-end Performance | 6 | |||||
 |
Core i5 | Mid-range Performance | 8 | |||||
 |
Core i7 | High-end Performance | 8/16 | |||||
Release Dates
Comet Lake is expected to be released in mid-2019.
Compatibility
 |
This section is empty; you can help add the missing info by editing this page. |
Compiler support
| Compiler | Arch-Specific | Arch-Favorable |
|---|---|---|
| ICC | -march=skylake |
-mtune=skylake
|
| GCC | -march=skylake |
-mtune=skylake
|
| LLVM | -march=skylake |
-mtune=skylake
|
| Visual Studio | /arch:AVX2 |
/tune:skylake
|
CPUID
| |
This section is empty; you can help add the missing info by editing this page. |
Architecture
Key changes from Coffee Lake
| |
This section is empty; you can help add the missing info by editing this page. |
Facts about "Comet Lake - Microarchitectures - Intel"
| codename | Comet Lake + |
| core count | 4 + |
| designer | Intel + |
| full page name | intel/microarchitectures/comet lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Comet Lake + |
| pipeline stages (max) | 19 + |
| pipeline stages (min) | 14 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |