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Difference between revisions of "intel/xeon gold/6244"
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Revision as of 21:38, 3 March 2019
| Edit Values | |
| Xeon Gold 6244 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | 6244 |
| Market | Server |
| Introduction | March, 2019 (announced) March, 2019 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Xeon Gold |
| Series | 6000 |
| Locked | Yes |
| Frequency | 3,600 MHz |
| Turbo Frequency | 4,400 MHz (1 core) |
| Clock multiplier | 36 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Cascade Lake |
| Platform | Purley |
| Chipset | Lewisburg |
| Core Name | Cascade Lake SP |
| Core Family | 6 |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 8 |
| Threads | 16 |
| Multiprocessing | |
| Max SMP | 4-Way (Multiprocessor) |
| Electrical | |
| TDP | 150 W |
| Tcase | 0 °C – 75 °C |
| TDTS | 0 °C – 102 °C |
| Packaging | |
| Template:packages/intel/fclga-3647 | |
Xeon Gold 6244 is a 64-bit octa-core x86 multi-socket high performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6244, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 3.6 GHz with a TDP of 150 W and a turbo boost frequency of up to 4.4 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Contents
Cache
- Main article: Skylake § Cache
The Xeon Gold 6244 features a considerably larger non-default 24.75 MiB of L3, a size that would normally be found on an 18-core part.
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon Gold 6244 - Intel"
| full page name | intel/xeon gold/6244 + |
| instance of | microprocessor + |
| ldate | 1900 + |